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ba2e390e1e
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test: debug single K-tile from full (128,64) SMEM
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2026-05-28 12:55:52 +00:00 |
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a7e8b483cd
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test: HD=64 multi-K-tile with correct source stride in SMEM writes
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2026-05-28 12:54:57 +00:00 |
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926ae5d7bf
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test: fix K source stride mismatch in manual SMEM write
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2026-05-28 12:54:03 +00:00 |
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7d16a30cb6
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test: exact HD=16 pattern with HD=64 data
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2026-05-28 12:53:13 +00:00 |
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db4f661843
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test: debug with (128,16) SMEM matching HD=16 exactly
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2026-05-28 12:52:19 +00:00 |
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b703dc0a50
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test: debug single K-tile with offset descriptor
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2026-05-28 12:51:33 +00:00 |
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435ca037cf
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test: use accumulate=false for first K-tile, skip TMEM zero
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2026-05-28 12:50:44 +00:00 |
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e8ac2120ad
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test: HD=64 QK with contiguous SMEM + offset descriptors
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2026-05-28 12:50:07 +00:00 |
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1c01e8e412
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test: fix inline asm line continuation for nvcc
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2026-05-28 12:48:45 +00:00 |
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71c774027c
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test: fix HD=64 QK — zero TMEM, fence after MMA, single-thread MMA call
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2026-05-28 12:47:51 +00:00 |
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1bf76388c8
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test: always accumulate, separate SMEM per K-tile, TMEM starts at 0
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2026-05-28 12:23:47 +00:00 |
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8707f555c2
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test: add extra syncwarp + syncthreads for MMA safety
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2026-05-28 12:20:01 +00:00 |
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5a65d46c26
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test: HD=64 with separate SMEM per K-tile — no offset descriptors needed
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2026-05-28 12:18:06 +00:00 |
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526fafb808
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test: revert volatile, fix wid==0, full 4 K-tiles
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2026-05-28 12:16:09 +00:00 |
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de879342dd
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test: 1 K-tile, volatile writes, verify SMEM
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2026-05-28 12:13:23 +00:00 |
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bd6440fd83
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test: volatile SMEM writes + 2 K-tiles
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2026-05-28 12:11:47 +00:00 |
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c2e41a858e
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test: force 2 K-tiles for debug
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2026-05-28 12:09:45 +00:00 |
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8b2200a6d3
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test: HD=64 full 4 K-tile accumulate + full-HD scalar reference
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2026-05-28 12:07:50 +00:00 |
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afb18caf2d
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test: clean HD=64, 1 K-tile only, verify SMEM writes + compare vs scalar
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2026-05-28 12:04:54 +00:00 |
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e587e26b06
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test: log canonical indices we write Q to
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2026-05-28 12:01:28 +00:00 |
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facd509c3c
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test: remove sanity check (zeroing loop overwrites), fix verify offsets
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2026-05-28 11:59:08 +00:00 |
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20ae390d32
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test: fix compile error
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2026-05-28 11:57:08 +00:00 |
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7b16eceb91
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test: more detailed SMEM sanity check
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2026-05-28 11:56:07 +00:00 |
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eb0ca18e23
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test: sanity check sQ[0] write+read
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2026-05-28 11:54:13 +00:00 |
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8936a2dec7
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test: clean SMEM write loops for HD=64
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2026-05-28 11:52:51 +00:00 |
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2ffbfda47d
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test: print SMEM verify data
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2026-05-28 11:51:08 +00:00 |
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4fd41365de
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test: add SMEM verify for HD=64 K-tile offsets
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2026-05-28 11:49:44 +00:00 |
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4483539f01
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test: HD=64 random data, 4 K-tiles, accumulate
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2026-05-28 11:47:56 +00:00 |
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73bd21ce01
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test: force 1 K-tile for HD=64 debug
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2026-05-28 11:46:12 +00:00 |
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abe1870429
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test: HD=64 all-ones, expected S[0,j]=64 (unscaled) or 8.0 scaled
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2026-05-28 11:44:31 +00:00 |
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73f9ff98c9
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test: UMMA QK HD=64 (4 K-tiles, accumulate) — multi-K-tile test
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2026-05-28 11:42:29 +00:00 |
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1874a70a6d
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test: fix var ref
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2026-05-28 11:39:15 +00:00 |
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8426d13285
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test: fix comparison — row 0 is S[0,c], rows 1-127 should be zero
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2026-05-28 11:38:22 +00:00 |
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6f40fafa91
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test: verify ALL 128 rows × 8 cols match scalar reference
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2026-05-28 11:36:46 +00:00 |
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3c7d9d9303
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test: apply 1/sqrt(HD) scale to MMA output — 4x was the scale factor, not a bug!
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2026-05-28 11:34:45 +00:00 |
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013f370046
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test: all-ones data, expected S[0,j]=16.0 for every j
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2026-05-28 11:32:56 +00:00 |
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f5a0966afc
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test: 4 warp leaders (lane==0) call MMA simultaneously
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2026-05-28 11:30:19 +00:00 |
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c01d6fddf4
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test: gau-nernst pattern — fence::after_thread_sync, 4 warps, 128 threads, 32x32b.x8 loop
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2026-05-28 11:28:47 +00:00 |
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a048b56886
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test: single-thread MMA + 0.25 scaling for 4× factor
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2026-05-28 10:23:06 +00:00 |
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57d67e6b51
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test: revert to 64-bit descriptors, 4 warp leaders, 32x32b read
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2026-05-28 10:21:06 +00:00 |
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3f95f1c5d4
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test: try LBO with block_mn=32 (1/4 of M=128)
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2026-05-28 10:11:38 +00:00 |
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d03e353972
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test: 4 warp leaders call MMA (Layout D requires 4 warps)
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2026-05-28 10:10:07 +00:00 |
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8059ed15ad
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test: explicitly zero padding between Q and K
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2026-05-28 10:08:35 +00:00 |
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9e98c067ab
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test: Layout D TMEM read using 32x32b.x8 format, 4 warps
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2026-05-28 10:07:15 +00:00 |
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68d1a7920c
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test: M=64 in both desc and idesc
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2026-05-28 10:04:17 +00:00 |
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0f51fda0da
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test: try N=8 in idesc
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2026-05-28 10:02:52 +00:00 |
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4f7c9649fd
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test: clean UMMA QK test, debug 4x factor, 8KB padding, 128 TMEM cols
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2026-05-28 10:01:39 +00:00 |
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ac65ece33b
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test: TMEM 2-store with fence outside wid guard, 64 threads
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2026-05-28 09:59:43 +00:00 |
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2c89eea6be
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test: fence+sync between 2 tmem_stores
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2026-05-28 09:58:51 +00:00 |
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24c5afe1dc
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test: 64 threads, 2 stores to col 0
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2026-05-28 09:57:53 +00:00 |
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