test: fix K source stride mismatch in manual SMEM write
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@@ -41,9 +41,25 @@ test_umma_hd64_debug(const bf16_t* __restrict__ q, const bf16_t* __restrict__ k,
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__syncthreads();
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uint32_t tb = *sTmemBase;
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// Load Q and K into SMEM in canonical layout — ONLY first 16 dims
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write_q_to_smem<16>(sQ, q);
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write_k_to_smem<128, 16>(sK, k); // k is (128, 64), but we only read first 16 cols
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// Load Q (first 16 dims) into (128, 16) canonical — manual write
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// Zero sQ
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for (int i = tid; i < 128 * 16; i += 128) sQ[i] = 0;
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// Q row 0, first 16 dims
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for (int c = tid; c < 16; c += 128) {
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int ck = c / 8, lc = c % 8;
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sQ[ck * 16 * 64 + lc] = q[c];
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}
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// Load K (first 16 cols of (128, 64)) into (128, 16) canonical
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// K source stride is 64, but we only write 16 columns to SMEM
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for (int i = tid; i < 128 * 16; i += 128) sK[i] = 0;
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for (int r = 0; r < 128; r++) {
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for (int c = tid; c < 16; c += 128) {
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int ck = c / 8, lc = c % 8;
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int tmn = r / 8, lr = r % 8;
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sK[ck * 16 * 64 + tmn * 64 + lr * 8 + lc] = k[r * 64 + c];
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}
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}
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bf16_t* sQ_pad = sQ + 128 * 16;
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for (int i = tid; i < 4096; i += 128) sQ_pad[i] = 0;
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__syncthreads();
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