183 lines
8.2 KiB
Markdown
183 lines
8.2 KiB
Markdown
# nvfp4-megamoe-kernel
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Native NVFP4 block-scaled MoE kernel for DeepSeek-V4-Pro on NVIDIA Blackwell (SM100).
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Replaces the broken `fp8_nvfp4_mega_moe` kernel from DeepGEMM with a working CUTLASS-based implementation that emits real `SM100_MMA_MXF4_SS` tensor core instructions.
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---
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## Architecture
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DeepSeek-V4-Pro is a 256-expert MoE model with expert parallelism across 8 ranks (B200 GPUs). Each rank handles 32 experts. For each token, the router picks the top-6 experts.
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### The MoE Forward Pass
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```
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Input hidden states (BF16)
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│
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▼
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┌─────────────────┐
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│ Shared Experts │ ← BYPASSED (returning zeros — FlashInfer TF32 GEMM crashes)
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│ (FlashInfer │
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│ CUTLASS) │
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└─────────────────┘
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│
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▼
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Staging Kernel (vLLM built-in)
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BF16 → packed E2M1 (int8) + UE4M3 block-16 scales (uint32)
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Writes to SymmBuffer.x / SymmBuffer.x_sf
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│
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▼
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Router (vLLM built-in)
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Writes topk_ids / topk_weights to SymmBuffer
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│
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▼
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┌─────────────────────────────────────────┐
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│ nvfp4_mega_moe_full │ ← nvfp4_mega_moe.py
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│ │
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│ 1. Read staged activation from buffer │
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│ 2. L1 GEMM: gate_up_proj │ ← CUTLASS NVFP4 block-scaled
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│ E2M1 × E2M1 + UE4M3 scales │ SM100_MMA_MXF4_SS PTX
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│ → BF16 output (6144-wide) │
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│ 3. SiLU(gate) * up (activation) │
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│ 4. stage_activation: BF16 → FP4 │ ← simple absmax quantize (needs work)
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│ 5. L2 GEMM: down_proj │ ← CUTLASS NVFP4 block-scaled
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│ E2M1 × E2M1 + UE4M3 scales │ SM100_MMA_MXF4_SS PTX
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│ → BF16 output (7168-wide) │
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│ 6. Write to output tensor │
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└─────────────────────────────────────────┘
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```
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### vLLM Startup Sequence (how our code plugs in)
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```
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1. vLLM engine init
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└─ ModelOptNvFp4Config selected (NVFP4 quantization scheme)
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└─ FlashInferCutlassNvFp4LinearKernel for linear layers
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2. Model construction
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└─ DeepseekV4ForCausalLM → DeepseekV4MoE → DeepseekV4DecoderLayer
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Each layer has: attention + MoE block
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MoE block has: shared experts + 256 routed experts
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3. Weight loading
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└─ 95 safetensor shards loaded
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└─ weight, weight_scale, weight_scale_2 loaded per linear
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4. process_weights_after_loading ← THIS IS WHERE WE HOOK IN
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└─ ModelOptNvFp4LinearMethod swizzles/pads weights for CUTLASS
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└─ finalize_mega_moe_weights()
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└─ weight_transform.py: transform_nvfp4_weights_for_mega_moe()
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• Folds weight_scale_2 (global scale) into weight_scale (block scale)
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• UE4M3 block-16 scales: 4 values packed per uint32
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• Interleaves L1 (gate_up) weights for 2CTA UMMA
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• Returns ((l1_w, l1_sf), (l2_w, l2_sf)) per rank
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5. SymmBuffer allocation
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└─ symm_buffer.py: get_symm_buffer_for_nvfp4 mega_moe()
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• Pre-allocates GPU buffers for:
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- x: int8 packed E2M1 activations
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- x_sf: uint32 packed UE4M3 activation scales
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- topk_idx: int32 expert indices
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- topk_weights: float32 routing weights
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- buffer: BF16 all-reduce buffer
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6. Profile run (warmup)
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└─ First forward pass to allocate KV cache, etc.
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└─ This is where the CUTLASS GEMM first executes
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7. Ready to serve
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```
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---
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## File Map
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```
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nvfp4_megamoe_kernel/
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├── __init__.py # Public API exports
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├── nvfp4_mega_moe.py # Main kernel: nvfp4_mega_moe_full, nvfp4_mega_moe_l1/l2, stage_activation
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├── weight_transform.py # Weight prep: fold global scale, pack UE4M3, interleave L1
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├── symm_buffer.py # GPU buffer allocation for MoE dispatch
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│
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└── cutlass_nvfp4_gemm/ # CUTLASS CUDA extension (the actual hardware kernel)
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├── cutlass_nvfp4_gemm.cu # CUDA: CUTLASS GEMM + SF remap kernel
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├── pytorch_binding.cpp # PyTorch C++ binding (_C.forward)
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├── kernel.py # Python: cutlass_grouped_nvfp4_gemm (per-expert loop)
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├── sf_layout.py # CUTLASS SF interleaved layout math
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├── setup.py # Build config (nvcc, CUTLASS include paths)
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├── build.sh # Build script
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├── test_gemm.py # Standalone test
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└── README.md
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```
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### What each file does (in call order)
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| File | When it runs | What it does |
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|------|-------------|--------------|
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| `weight_transform.py` | Once at startup (weight loading) | Takes raw NVFP4 checkpoint weights, folds global scales into block scales, packs UE4M3 into uint32, interleaves L1 gate_up weights. Output: `((l1_w, l1_sf), (l2_w, l2_sf))` |
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| `symm_buffer.py` | Once at startup (buffer alloc) | Pre-allocates GPU tensors for activations, scales, routing data, and all-reduce. These persist across forward passes. |
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| `nvfp4_mega_moe.py` | Every forward pass | Orchestrates the MoE: reads from symm buffer → L1 GEMM → activation → re-quantize → L2 GEMM → output. Contains `stage_activation` (BF16→FP4 quantize for L1→L2). |
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| `cutlass_nvfp4_gemm/kernel.py` | Every forward pass (called by nvfp4_mega_moe) | Per-expert loop: gather tokens for each expert, call CUTLASS GEMM, scatter results with routing weights. |
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| `cutlass_nvfp4_gemm/cutlass_nvfp4_gemm.cu` | Every forward pass (CUDA kernel) | The actual CUTLASS kernel: native NVFP4 block-scaled GEMM + GPU-side scale factor remap (row-major → CUTLASS interleaved layout). |
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| `cutlass_nvfp4_gemm/sf_layout.py` | Build time / reference | Documents the CUTLASS SfAtom layout. Currently unused at runtime (remap is in CUDA). |
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---
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## Data Formats
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### Weights
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- **Packed E2M1** (`int8`): 2 FP4 values per byte. Shape: `(E_per_rank, N, K//2)`, K-major layout.
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- **UE4M3 block scales** (`float8_e4m3fn`): 1 scale per 16 FP4 values (group_size=16). Shape: `(E_per_rank, N, K//16)`.
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### Activations (after staging kernel)
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- **Packed E2M1** (`int8`): Shape: `(num_tokens, K//2)`.
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- **UE4M3 scales** (`uint32`): 4 UE4M3 values packed per uint32. Shape: `(num_tokens, K//64)`.
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### GEMM dimensions (DeepSeek-V4-Pro)
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- **L1 (gate_up_proj):** M×6144×7168 (per expert)
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- **L2 (down_proj):** M×7168×3072 (per expert)
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- 48 experts per rank (256 total / 8 ranks), top-6 routing
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---
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## Build & Deploy (B200)
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```bash
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# On B200 host — CUTLASS must be cloned and mounted
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cd /root/nvidia-meeting/deepseek-v4-quant/
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# Rebuild container (CUTLASS is host-mounted at /root/cutlass)
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KERNEL_CACHE_BUSTER=$(date +%s) docker compose build --no-cache
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docker compose up -d
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```
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The CUTLASS extension builds inside the container during `pip install` of the nvfp4-megamoe-kernel package. It needs:
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- CUDA 13.0 toolkit (in the vllm/vllm-openai:nightly image)
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- CUTLASS headers at `/root/cutlass/include/`
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- CCCL headers at `/usr/local/cuda-13.0/targets/x86_64-linux/include/cccl/`
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- Device with SM100 compute capability (B200)
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---
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## Known Issues
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1. **Shared experts bypassed** — FlashInfer/DeepGEMM TF32 GEMM crashes the vLLM worker. Currently returning zeros for shared expert output. This produces garbage text.
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2. **MoE dispatch is slow** — `cutlass_grouped_nvfp4_gemm` uses a Python loop over 48 experts with per-token scatter/gather. Needs a proper grouped GEMM or at least CUDA-side dispatch.
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3. **stage_activation is approximate** — Simple per-token absmax quantization for L1→L2 re-quant. Should use proper E2M1 quantization matching vLLM's staging kernel.
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4. **Scale factor remap adds overhead** — GPU kernel remaps row-major → CUTLASS interleaved layout every GEMM call. Should pre-compute during weight transform.
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---
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## Environment Variables
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| Variable | Default | Description |
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|----------|---------|-------------|
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| `MEGA_MOE_STATIC` | 0 | Set to 1 to skip MoE kernel entirely (return zeros) |
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| `MEGA_MOE_DEBUG` | 0 | Set to 1 for verbose logging |
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| `MEGA_MOE_USE_CUTLASS` | 1 | Use CUTLASS path (always 1 now, TileLang removed) |
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| `SKIP_ATTENTION` | 0 | Skip attention layers (debug) |
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