SiLU in registers: PASS (0.034% error, Step 1 stable) Gate/up subtile detection: blocked by CuTeDSL type system CuTeDSL compiles the kernel for ALL subtile iterations at once. Runtime conditionals (if is_gate_subtile) that affect: - Register tensor assignment → DSLRuntimeError (type structure mismatch) - TMA store skipping → corrupted output - Mask blending → wrong results Path forward: use const_expr debug flag for the BF16 side output, or process gate/up in a separate post-GEMM kernel.
111 lines
4.0 KiB
Python
111 lines
4.0 KiB
Python
"""Test: Validate gate/up subtile detection (Step 2).
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The fused kernel writes:
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- Gate subtiles (0,1): SiLU applied, stored to C tensor at positions 0,1
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- Up subtiles (2,3): raw values, stored to C tensor at positions 0,1 (overwriting gate)
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(because TMA store uses gate_subtile_idx for up subtiles)
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For now, the output is still (M, 2*intermediate). We compare the
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gate half of the output against SiLU(gate_ref) and the up half against up_ref.
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"""
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import torch
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import sys
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sys.path.insert(0, '/root/dsv4-nvfp4-workspace/kernel')
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from cutedsl.bridge import (
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quantize_weight_to_nvfp4,
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quantize_activation_nvfp4,
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make_b_k_major,
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assemble_scales_2d_side,
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assemble_scales_3d_side,
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run_nvfp4_grouped_gemm,
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run_fused_swiglu_grouped_gemm,
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warmup_compilation,
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)
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def test_gate_up_subtile():
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device = "cuda"
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num_experts = 4
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hidden = 512
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intermediate = 256
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num_tokens = 32
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torch.manual_seed(42)
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x = torch.randn(num_tokens, hidden, dtype=torch.bfloat16, device=device)
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l1_w = torch.randn(num_experts, 2 * intermediate, hidden, dtype=torch.bfloat16, device=device)
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l1_fp4_list, l1_sf_list, l1_gs_list = [], [], []
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for e in range(num_experts):
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w_fp4, w_sf, w_gs = quantize_weight_to_nvfp4(l1_w[e].T)
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l1_fp4_list.append(w_fp4)
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l1_sf_list.append(w_sf)
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l1_gs_list.append(w_gs)
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l1_mat_b = make_b_k_major(torch.stack(l1_fp4_list))
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l1_scale_b = assemble_scales_3d_side(l1_sf_list)
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l1_gs = torch.tensor(l1_gs_list, dtype=torch.float32, device=device)
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gs_val = x.abs().max().item() / (6.0 * 448.0)
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x_fp4, x_sf = quantize_activation_nvfp4(x, gs_val)
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tokens_per_expert = [num_tokens // num_experts] * num_experts
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scale_a = assemble_scales_2d_side([x_sf[i*tpe:(i+1)*tpe] for i, tpe in enumerate(tokens_per_expert)])
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expert_offsets = torch.tensor(
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[sum(tokens_per_expert[:e+1]) for e in range(num_experts)],
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dtype=torch.int32, device=device,
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)
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global_scale_a = torch.full((num_experts,), gs_val, dtype=torch.float32, device=device)
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warmup_compilation(num_experts, hidden // 2, (2 * intermediate) // 2, device)
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# Standard L1 GEMM
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out_bf16 = run_nvfp4_grouped_gemm(
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mat_a=x_fp4, mat_b=l1_mat_b,
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scale_a=scale_a, scale_b=l1_scale_b,
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expert_offsets=expert_offsets,
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global_scale_a=global_scale_a, global_scale_b=l1_gs,
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)
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gate_ref = out_bf16[:, :intermediate]
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up_ref = out_bf16[:, intermediate:]
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silu_gate_ref = torch.nn.functional.silu(gate_ref)
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# Fused kernel
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print("Running fused kernel...")
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out_fused = run_fused_swiglu_grouped_gemm(
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mat_a=x_fp4, mat_b=l1_mat_b,
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scale_a=scale_a, scale_b=l1_scale_b,
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expert_offsets=expert_offsets,
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global_scale_a=global_scale_a, global_scale_b=l1_gs,
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)
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print(f"Fused output: shape={out_fused.shape}, amax={out_fused.abs().amax().item():.4f}")
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# The output has both gate (with SiLU) and up (raw) subtiles
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# Gate is in the first half, up in the second half
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fused_gate = out_fused[:, :intermediate]
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fused_up = out_fused[:, intermediate:]
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# Compare gate: fused should have SiLU applied
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gate_diff = (fused_gate - silu_gate_ref).float()
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gate_rel_err = gate_diff.norm() / silu_gate_ref.float().norm()
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gate_max_err = gate_diff.abs().max()
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# Compare up: fused should have raw values (no SiLU)
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up_diff = (fused_up - up_ref).float()
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up_rel_err = up_diff.norm() / up_ref.float().norm()
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up_max_err = up_diff.abs().max()
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print(f"\n=== Gate Comparison (SiLU applied) ===")
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print(f"Rel error: {gate_rel_err.item():.6f}")
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print(f"Max abs error: {gate_max_err.item():.6f}")
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print(f"Gate PASS" if gate_rel_err.item() < 0.05 else "Gate FAIL")
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print(f"\n=== Up Comparison (raw values) ===")
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print(f"Rel error: {up_rel_err.item():.6f}")
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print(f"Max abs error: {up_max_err.item():.6f}")
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print(f"Up PASS" if up_rel_err.item() < 0.05 else "Up FAIL")
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if __name__ == "__main__":
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test_gate_up_subtile()
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