biondizzle
a94011ec92
The _NVFP4_STEP_LUT_LOCK caused 'Unsupported context manager' under torch.compile/cudagraph. LUT is now pre-populated during warmup so the fast path (cache hit) never hits a lock. Also removed all init/warmup debug prints from CuTeDSL kernels.
372 lines
13 KiB
Python
372 lines
13 KiB
Python
"""
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Bridge layer for the CuTeDSL NVFP4 MoE kernel.
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Handles tensor layout conversion from our pipeline's format to what
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the ScaledGroupedGemmKernel expects:
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- BF16 → NVFP4 quantization (float4_e2m1fn_x2)
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- Scale factor assembly (padding + swizzle)
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- B tensor K-major stride conversion
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- Expert offset computation
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"""
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import math
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import torch
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import cutlass
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import cutlass.cute as cute
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import cutlass.torch as cutlass_torch
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import cutlass.utils as utils
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from cutedsl.kernel.moe.torch_scaled_grouped_mm import (
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ScaledGroupedGemmKernel,
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pad_and_swizzle_single,
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assemble_raw_scales_2d3d_2d_side,
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assemble_raw_scales_2d3d_3d_side,
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cat_byte_reinterpretable_tensors,
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stack_byte_reinterpretable_tensors,
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)
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# ── Constants ──────────────────────────────────────────────────────────
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E2M1_MAGNITUDES = [0.0, 0.5, 1.0, 1.5, 2.0, 3.0, 4.0, 6.0]
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# Cache compiled kernels by (num_experts, device, K, N)
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_compiled_kernel_cache = {}
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# Cached LUT for E2M1 quantization (created once per device, cudagraph-safe)
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_NVFP4_STEP_LUT_CACHE = {}
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def _get_step_to_idx_lut(device):
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"""Get or create the E2M1 step-to-index LUT for the given device.
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Cached per device to avoid CPU->CUDA copies during cudagraph capture.
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Must be pre-populated during warmup (before torch.compile/cudagraph capture)
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so the lock is never entered on the compiled path.
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"""
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# Fast path: already cached — no lock needed (torch.compile-safe)
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if device in _NVFP4_STEP_LUT_CACHE:
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return _NVFP4_STEP_LUT_CACHE[device]
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# Slow path: first call, create the LUT
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lut = torch.as_tensor(
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[0, 1, 2, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7],
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dtype=torch.int8, device=device,
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)
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_NVFP4_STEP_LUT_CACHE[device] = lut
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return lut
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SF_VEC_SIZE = 16 # NVFP4 block size
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def ceil_div(a, b):
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return (a + b - 1) // b
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def round_up(a, b):
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return ceil_div(a, b) * b
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# ── Quantization ──────────────────────────────────────────────────────
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def quantize_to_nvfp4(x_bf16, block_size=SF_VEC_SIZE):
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"""Quantize BF16 tensor to NVFP4.
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Args:
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x_bf16: (..., D) BF16 tensor
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Returns:
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x_fp4: (..., D//2) float4_e2m1fn_x2 — native PyTorch FP4
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x_sf: (..., D//16) float8_e4m3fn — block scales
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global_scale: float32 scalar
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"""
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x_f32 = x_bf16.float()
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amax = x_f32.abs().max().clamp(min=1e-8).float()
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global_scale = amax / (6.0 * 448.0)
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x_norm = x_f32 / global_scale
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last_dim = x_norm.shape[-1]
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n_blocks = ceil_div(last_dim, block_size)
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if last_dim % block_size != 0:
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pad_size = n_blocks * block_size - last_dim
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x_norm = torch.nn.functional.pad(x_norm, (0, pad_size))
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x_reshaped = x_norm.reshape(*x_norm.shape[:-1], n_blocks, block_size)
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block_amax = x_reshaped.abs().amax(dim=-1).clamp(min=1e-8)
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block_scale = (block_amax / 6.0).to(torch.float8_e4m3fn)
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# Nearest E2M1
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block_sf_expanded = block_scale.float().unsqueeze(-1)
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x_scaled = x_reshaped / block_sf_expanded.clamp(min=1e-8)
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signs = torch.sign(x_scaled)
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abs_scaled = x_scaled.abs().clamp(max=6.0)
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half_steps = (abs_scaled * 2.0).round().clamp(0, 12).to(torch.int8)
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step_to_idx = _get_step_to_idx_lut(x_bf16.device)
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indices = step_to_idx[half_steps.long()]
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nibbles = torch.where(signs < 0, indices + 8, indices).to(torch.uint8)
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even = nibbles[..., ::2]
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odd = nibbles[..., 1::2]
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packed = (odd << 4) | even
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packed_shape = list(x_bf16.shape)
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packed_shape[-1] = last_dim // 2
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x_fp4 = packed.view(torch.float4_e2m1fn_x2).reshape(packed_shape)
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sf_shape = list(x_bf16.shape[:-1]) + [n_blocks]
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block_scale = block_scale.reshape(sf_shape)
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return x_fp4, block_scale, global_scale
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def quantize_activation_nvfp4(x_bf16, global_scale, block_size=SF_VEC_SIZE):
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"""Quantize BF16 activation tensor to NVFP4 (cudagraph-safe).
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Unlike quantize_to_nvfp4(), this takes a pre-computed global_scale
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instead of computing it via .max() (which forces CPU-GPU sync).
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All operations are pure GPU with no CPU-GPU syncs.
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Args:
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x_bf16: (..., D) BF16 tensor
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global_scale: float32 scalar (pre-computed, NOT from .max())
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block_size: NVFP4 block size
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Returns:
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x_fp4: (..., D//2) float4_e2m1fn_x2
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x_sf: (..., D//16) float8_e4m3fn
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"""
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x_f32 = x_bf16.float()
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x_norm = x_f32 / global_scale
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last_dim = x_norm.shape[-1]
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n_blocks = ceil_div(last_dim, block_size)
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if last_dim % block_size != 0:
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pad_size = n_blocks * block_size - last_dim
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x_norm = torch.nn.functional.pad(x_norm, (0, pad_size))
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x_reshaped = x_norm.reshape(*x_norm.shape[:-1], n_blocks, block_size)
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block_amax = x_reshaped.abs().amax(dim=-1).clamp(min=1e-8)
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block_scale = (block_amax / 6.0).to(torch.float8_e4m3fn)
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block_sf_expanded = block_scale.float().unsqueeze(-1)
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x_scaled = x_reshaped / block_sf_expanded.clamp(min=1e-8)
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signs = torch.sign(x_scaled)
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abs_scaled = x_scaled.abs().clamp(max=6.0)
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half_steps = (abs_scaled * 2.0).round().clamp(0, 12).to(torch.int8)
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step_to_idx = _get_step_to_idx_lut(x_bf16.device)
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indices = step_to_idx[half_steps.long()]
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nibbles = torch.where(signs < 0, indices + 8, indices).to(torch.uint8)
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even = nibbles[..., ::2]
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odd = nibbles[..., 1::2]
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packed = (odd << 4) | even
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packed_shape = list(x_bf16.shape)
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packed_shape[-1] = last_dim // 2
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x_fp4 = packed.view(torch.float4_e2m1fn_x2).reshape(packed_shape)
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sf_shape = list(x_bf16.shape[:-1]) + [n_blocks]
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block_scale = block_scale.reshape(sf_shape)
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return x_fp4, block_scale
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def quantize_weight_to_nvfp4(w_bf16, block_size=SF_VEC_SIZE):
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"""Quantize BF16 weight matrix to NVFP4.
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The weight is (K, N) where K is the input dim (packed dimension).
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Block scales are computed along K (dim 0).
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Args:
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w_bf16: (K, N) BF16 weight matrix
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Returns:
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w_fp4: (K//2, N) float4_e2m1fn_x2 — K is the packed dim
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w_sf: (K//16, N) float8_e4m3fn — block scales along K
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global_scale: float32 scalar
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"""
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K, N = w_bf16.shape
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w_f32 = w_bf16.float()
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amax = w_f32.abs().max().clamp(min=1e-8).float()
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global_scale = amax / (6.0 * 448.0)
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w_norm = w_f32 / global_scale
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k_blocks = ceil_div(K, block_size)
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if K % block_size != 0:
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w_norm = torch.nn.functional.pad(w_norm, (0, 0, 0, k_blocks * block_size - K))
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w_reshaped = w_norm.reshape(k_blocks, block_size, N)
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w_block_amax = w_reshaped.abs().amax(dim=1).clamp(min=1e-8)
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w_sf = (w_block_amax / 6.0).to(torch.float8_e4m3fn)
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w_block_sf = w_sf.float().unsqueeze(1)
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w_scaled = w_reshaped / w_block_sf.clamp(min=1e-8)
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signs = torch.sign(w_scaled)
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abs_scaled = w_scaled.abs().clamp(max=6.0)
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half_steps = (abs_scaled * 2.0).round().clamp(0, 12).to(torch.int8)
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step_to_idx = _get_step_to_idx_lut(w_bf16.device)
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indices = step_to_idx[half_steps.long()]
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nibbles = torch.where(signs < 0, indices + 8, indices).to(torch.uint8)
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even = nibbles[:, ::2, :]
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odd = nibbles[:, 1::2, :]
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packed = (odd << 4) | even
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w_fp4 = packed.reshape(K // 2, N).view(torch.float4_e2m1fn_x2)
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return w_fp4, w_sf, global_scale
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# ── Scale Factor Assembly ─────────────────────────────────────────────
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def assemble_scales_2d_side(raw_scales):
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"""Assemble activation scale factors for the 2Dx3D scenario.
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Args:
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raw_scales: list of (M_e, K_sf) float8_e4m3fn tensors, one per expert
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Returns:
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Assembled and swizzled scale tensor
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"""
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return assemble_raw_scales_2d3d_2d_side(raw_scales)
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def assemble_scales_3d_side(raw_scales):
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"""Assemble weight scale factors for the 2Dx3D scenario.
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Args:
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raw_scales: list of (K_sf, N) float8_e4m3fn tensors, one per expert
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NOTE: These will be transposed to (N, K_sf) before swizzling,
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since the kernel expects N as the non-K dimension.
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Returns:
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Assembled and swizzled scale tensor
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"""
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# Kernel expects (N, K_sf) — transpose before swizzling
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transposed = [sf.T.contiguous() for sf in raw_scales]
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return assemble_raw_scales_2d3d_3d_side(transposed)
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# ── Tensor Layout Conversion ──────────────────────────────────────────
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def make_b_k_major(b_tensor):
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"""Convert B tensor from N-major to K-major layout.
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The kernel expects B with stride (E*K*N, 1, K) — K is contiguous.
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torch.stack produces stride (E*K*N, N, 1) — N is contiguous.
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Args:
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b_tensor: (experts, K_packed, N_packed) float4_e2m1fn_x2, N-major
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Returns:
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Same shape, K-major strides
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"""
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return b_tensor.permute(0, 2, 1).contiguous().permute(0, 2, 1)
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def compute_expert_offsets(tokens_per_expert, num_experts, device="cuda"):
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"""Compute cumulative token offsets for the grouped GEMM.
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Args:
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tokens_per_expert: list of int, one per expert
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Returns:
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offs: (num_experts,) int32 — cumulative sum
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"""
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offs = torch.tensor(
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[sum(tokens_per_expert[:e+1]) for e in range(num_experts)],
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dtype=torch.int32, device=device,
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)
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return offs
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# ── Kernel Launch ─────────────────────────────────────────────────────
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def run_nvfp4_grouped_gemm(
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mat_a, # (tokens_sum, K_packed) float4_e2m1fn_x2
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mat_b, # (experts, K_packed, N_packed) float4_e2m1fn_x2, K-major
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scale_a, # assembled 2D side (padded + swizzled)
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scale_b, # assembled 3D side (padded + swizzled)
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expert_offsets, # (experts,) int32 cumulative token offsets
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global_scale_a=None, # (experts,) float32
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global_scale_b=None, # (experts,) float32
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mma_tiler_mn=(128, 128),
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cluster_shape_mn=(1, 1),
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):
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"""Run the CuTeDSL NVFP4 scaled grouped GEMM.
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2Dx3D: A(tokens, K) x B(experts, K, N) -> C(tokens, N)
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CUDAGraph-compatible: kernel is compiled once on first call (warmup),
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then only the compiled kernel is invoked on subsequent calls.
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No torch.cuda.synchronize() or .item() in the forward path.
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"""
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num_experts = mat_b.shape[0]
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n_dim = mat_b.shape[2] # packed N (in float4 elements)
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tokens_sum = mat_a.shape[0]
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out = torch.zeros(tokens_sum, n_dim, dtype=torch.bfloat16, device=mat_a.device)
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kernel = ScaledGroupedGemmKernel(
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scenario="2Dx3D",
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sf_vec_size=SF_VEC_SIZE,
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accumulate_on_output=False,
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separate_tensormap_init=True,
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consistent_token_padding=False,
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mma_tiler_mnk=(*mma_tiler_mn, 256),
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cluster_shape_mnk=(*cluster_shape_mn, 1),
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)
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# Convert to CuTe tensors with dynamic layout
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def to_cute(t):
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ct = cutlass_torch.from_dlpack(t)
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return ct.mark_layout_dynamic(leading_dim=cutlass_torch.get_leading_dim(t))
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a_c = to_cute(mat_a)
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b_c = to_cute(mat_b)
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sfa_c = to_cute(scale_a)
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sfb_c = to_cute(scale_b)
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c_c = to_cute(out)
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offs_c = to_cute(expert_offsets)
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workspace_size = kernel.get_workspace_size(num_experts)
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workspace = torch.full((workspace_size,), 255, dtype=torch.uint8, device=mat_a.device)
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ws_c = to_cute(workspace)
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gsa_c = to_cute(global_scale_a) if global_scale_a is not None else None
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gsb_c = to_cute(global_scale_b) if global_scale_b is not None else None
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import cuda.bindings.driver as cuda
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cluster_size = cluster_shape_mn[0] * cluster_shape_mn[1]
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max_active_clusters = utils.HardwareInfo().get_max_active_clusters(cluster_size)
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stream = cuda.CUstream(torch.cuda.current_stream().cuda_stream)
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# Cache compiled kernel by (num_experts, K, N)
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cache_key = (num_experts, str(mat_a.device), mma_tiler_mn, cluster_shape_mn,
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mat_a.shape[1], mat_b.shape[2])
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if cache_key not in _compiled_kernel_cache:
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# First call: compile with real tensors
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compiled = cute.compile(
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kernel, a_c, b_c, sfa_c, sfb_c, c_c, offs_c, ws_c,
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max_active_clusters, stream,
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global_scale_a=gsa_c, global_scale_b=gsb_c,
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)
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# Warmup run
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compiled(
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a_c, b_c, sfa_c, sfb_c, c_c, offs_c, ws_c,
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stream,
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global_scale_a=gsa_c, global_scale_b=gsb_c,
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)
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_compiled_kernel_cache[cache_key] = compiled
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else:
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# Subsequent calls: just invoke the compiled kernel
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compiled = _compiled_kernel_cache[cache_key]
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compiled(
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a_c, b_c, sfa_c, sfb_c, c_c, offs_c, ws_c,
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stream,
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global_scale_a=gsa_c, global_scale_b=gsb_c,
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)
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return out
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