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fee022a485
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test: MMA→4-warp read using proven fmha_common+umma_desc infra
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2026-05-28 23:05:29 +00:00 |
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e1a708a187
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test: try 16x256b.x1 with column step=4 (4 cols per read)
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2026-05-28 23:03:51 +00:00 |
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95003eced2
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test: 16x256b.x1 loads with uint32_t regs, matching working pattern
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2026-05-28 23:03:10 +00:00 |
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fffb493b0e
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fix: 16x256b.x1 load syntax — single address operand
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2026-05-28 23:02:23 +00:00 |
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44dcd6e8d0
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test: 16x256b.x1 multiple LOADS — do they crash like stores?
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2026-05-28 23:02:03 +00:00 |
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d54bce6a6d
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fix: correct SMEM size for MMA 4-warp test
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2026-05-28 23:01:12 +00:00 |
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be45e87891
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test: MMA→4-warp TMEM read — do warps see different rows?
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2026-05-28 23:00:27 +00:00 |
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6b0d57074a
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test: TMEM cross-warp visibility with different sync strategies
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2026-05-28 22:59:31 +00:00 |
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77d190278e
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test: simpler TMEM 4-warp read — direct store+load
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2026-05-28 22:58:48 +00:00 |
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91b03bd6bd
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test: verify 4-warp TMEM read with 32x32b.x8 after MMA
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2026-05-28 22:57:59 +00:00 |
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28e04a5ea8
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fix: use __cvta_generic_to_shared directly for 64-bit compat
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2026-05-28 22:56:29 +00:00 |
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1d6a95df32
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fix: typo in tmem row offset test
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2026-05-28 22:56:15 +00:00 |
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cf6fe71368
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test: verify TMEM 32x32b.x8 row offset addressing
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2026-05-28 22:56:00 +00:00 |
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4cfb707405
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fix: correct SMEM size calculation in multirow test
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2026-05-28 22:53:46 +00:00 |
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863a030c3b
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fmha_multirow: rewrite with 32x32b.x8 only, no s_p_vals, row_page addressing
- Kill 64KB s_p_vals buffer — P is streamed per K-tile through sPk
- All TMEM ops use 32x32b.x8 exclusively (16x256b.x1 crashes on 2nd call)
- T>32: 4 softmax warps use row_page offset in TMEM address (row<<16)
- Lane l in warp w handles row w*32+l
- Two-pass softmax: pass 1 row_max, pass 2 exp/sum interleaved with PV
- PV: N=16 sub-tiles, SS MMA sPk(128,16) × sV(16,16) → TMEM
- Epilogue: 32x32b.x8 TMEM read, normalize, BF16 → GMEM
- SMEM budget: ~14KB (well within 232KB)
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2026-05-28 22:52:52 +00:00 |
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08694b8136
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Fix multi-row softmax v3: 32x32b.x8 with per-lane per-row (no wmax/wsum), per-row sRowMax/sRowSum arrays
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2026-05-28 20:10:13 +00:00 |
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bf4dfd131b
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Fix nvcc goto-bypasses-init: move var decls before goto targets
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2026-05-28 20:04:59 +00:00 |
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2b09d4f2ef
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Fix nvcc goto-bypasses-init in multi-row test
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2026-05-28 20:04:45 +00:00 |
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d8b421ccee
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Multi-row FMHA kernel (Milestone 4): T>1 prefill support with 4-warp parallel softmax
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2026-05-28 20:04:29 +00:00 |
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3fd302e7a0
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Fix nvcc goto-bypasses-init errors in multi-head test
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2026-05-28 19:33:04 +00:00 |
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aa41cfa2e5
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Multi-head FMHA kernel (Milestone 5): grid launch with MHA/MQA/batch support
- fmha_6warp_multihead.cuh: grid=(1, n_h, batch) kernel with FmhaParams
- MQA support via k_head_stride=0 / v_head_stride=0
- LSE output for multi-segment KV merge composition
- test_fmha_6warp_multihead.cu: MHA (4+8 heads), MQA, batched tests
- HD-specific wrappers for hd=16/64/128/256
- Marked E2M1 dequant bug as FIXED in consultant issue file
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2026-05-28 19:32:35 +00:00 |
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6af2feb42a
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TMA 5D test: element stride decomposition
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2026-05-28 19:18:01 +00:00 |
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96f2f0bb90
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auto: pre-test commit
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2026-05-28 19:12:23 +00:00 |
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015435b1ab
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auto: pre-test commit
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2026-05-28 19:09:50 +00:00 |
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41343fdc6b
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auto: pre-test commit
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2026-05-28 19:08:04 +00:00 |
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a723b524f7
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TMA alignment test
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2026-05-28 17:00:20 +00:00 |
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c54a83960d
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TMA debug: fix globalStrides to tensorRank-1 elements
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2026-05-28 16:58:30 +00:00 |
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944e567b6c
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TMA debug: test various CUtensorMap configs
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2026-05-28 16:55:25 +00:00 |
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55d289c65b
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Fix TMA: use CU_TENSOR_MAP_DATA_TYPE_BFLOAT16 not UINT16
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2026-05-28 16:51:40 +00:00 |
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0fd3e12a52
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Fix TMA test: globalStrides in bytes not elements
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2026-05-28 16:46:56 +00:00 |
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ad8050bbad
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WIP: TMA load test infrastructure (manual compile needed)
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2026-05-28 16:45:04 +00:00 |
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d9df1e6486
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auto: pre-test commit
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2026-05-28 16:42:24 +00:00 |
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a4211559cf
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auto: pre-test commit
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2026-05-28 16:40:51 +00:00 |
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3b8fdcc823
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auto: pre-test commit
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2026-05-28 16:39:45 +00:00 |
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072fbf0b5d
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auto: pre-test commit
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2026-05-28 16:36:53 +00:00 |
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2a6d72912a
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auto: pre-test commit
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2026-05-28 16:28:58 +00:00 |
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01319d7247
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auto: pre-test commit
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2026-05-28 15:59:22 +00:00 |
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43516ed4ec
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auto: pre-test commit
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2026-05-28 15:55:59 +00:00 |
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1ec3e1ed2c
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auto: pre-test commit
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2026-05-28 15:55:18 +00:00 |
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babff1f402
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auto: pre-test commit
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2026-05-28 15:54:05 +00:00 |
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2b007d2008
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auto: pre-test commit
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2026-05-28 15:53:39 +00:00 |
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84b997881f
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auto: pre-test commit
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2026-05-28 15:53:04 +00:00 |
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6e5401df3b
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auto: pre-test commit
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2026-05-28 15:51:55 +00:00 |
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102174fade
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auto: pre-test commit
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2026-05-28 15:50:52 +00:00 |
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2dcfc0089f
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auto: pre-test commit
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2026-05-28 15:49:47 +00:00 |
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1cdb90462f
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auto: pre-test commit
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2026-05-28 15:48:15 +00:00 |
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80fd612132
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auto: pre-test commit
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2026-05-28 15:47:58 +00:00 |
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9583cbc67a
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auto: pre-test commit
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2026-05-28 15:46:53 +00:00 |
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1b86860c19
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auto: pre-test commit
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2026-05-28 15:46:16 +00:00 |
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6249989cf6
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Clean up HD=64 test, V layout verified correct
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2026-05-28 15:21:33 +00:00 |
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