WIP: TMA load test infrastructure (manual compile needed)
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123
tests/unit/test_tma_driver.cu
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123
tests/unit/test_tma_driver.cu
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/**
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* Minimal TMA load test — compiled manually with -lcuda
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* Tests: CUtensorMap creation + cp.async.bulk.tensor.2d PTX + mbarrier sync
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*/
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#include <cuda.h>
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#include <cuda_runtime.h>
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#include <cstdio>
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#include <cstring>
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#include <cmath>
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typedef unsigned short bf16_t;
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static bf16_t f32_to_bf16_host(float f) { uint32_t u; memcpy(&u,&f,4); return (uint16_t)(u>>16); }
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static float bf16_to_f32_host(bf16_t h) { uint32_t u=(uint32_t)h<<16; float f; memcpy(&f,&u,4); return f; }
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constexpr int ROWS = 128, COLS = 16;
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constexpr int TILE_ROWS = 128, TILE_COLS = 16;
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__global__ void __launch_bounds__(32)
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tma_test_kernel(const CUtensorMap* __restrict__ tma_desc, bf16_t* gmem_dst) {
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extern __shared__ char sbuf[];
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uint64_t* sMbar = (uint64_t*)sbuf;
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bf16_t* sData = (bf16_t*)(((uintptr_t)(sbuf + 8) + 127) & ~(uintptr_t)127);
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// Init mbarrier
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if (threadIdx.x == 0) {
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asm volatile("mbarrier.init.shared.b64 [%0], %1;"
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:: "r"((uint32_t)__cvta_generic_to_shared(sMbar)), "r"(1));
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}
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__syncthreads();
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// Issue TMA load
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if (threadIdx.x == 0) {
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uint32_t smem_addr = (uint32_t)__cvta_generic_to_shared(sData);
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uint32_t mbar_addr = (uint32_t)__cvta_generic_to_shared(sMbar);
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uint64_t tma_addr = (uint64_t)tma_desc;
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asm volatile(
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"cp.async.bulk.tensor.2d.shared::cluster.global.mbarrier::complete_tx::bytes "
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"[%0], [%1, {%3, %4}], [%2];"
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:: "r"(smem_addr), "l"(tma_addr), "r"(mbar_addr), "r"(0), "r"(0)
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: "memory"
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);
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}
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__syncthreads();
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// Wait for TMA
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if (threadIdx.x == 0) {
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asm volatile(
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"{\n\t"
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".reg .pred p;\n\t"
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"LOOP:\n\t"
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"mbarrier.try_wait.parity.shared.b64 p, [%0], %1;\n\t"
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"@p bra DONE;\n\t"
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"bra LOOP;\n\t"
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"DONE:\n\t"
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"}"
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:: "r"((uint32_t)__cvta_generic_to_shared(sMbar)), "r"(0)
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: "memory"
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);
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}
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__syncthreads();
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// Copy SMEM → GMEM
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for (int i = threadIdx.x; i < ROWS * COLS; i += 32) {
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gmem_dst[i] = sData[i];
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}
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}
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int main() {
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printf("=== TMA Load Test (driver API) ===\n");
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constexpr int TOTAL = ROWS * COLS;
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constexpr int DATA_BYTES = TOTAL * sizeof(bf16_t);
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bf16_t* h_src = (bf16_t*)malloc(DATA_BYTES);
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bf16_t* h_dst = (bf16_t*)calloc(TOTAL, sizeof(bf16_t));
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srand(42);
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for (int i = 0; i < TOTAL; i++) h_src[i] = f32_to_bf16_host((float)(rand()%100)/100.0f - 0.5f);
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bf16_t *d_src, *d_dst;
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cudaMalloc(&d_src, DATA_BYTES);
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cudaMalloc(&d_dst, DATA_BYTES);
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cudaMemcpy(d_src, h_src, DATA_BYTES, cudaMemcpyHostToDevice);
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// Create CUtensorMap
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uint64_t gdim[] = {(uint64_t)COLS, (uint64_t)ROWS};
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uint64_t gstr[] = {1, (uint64_t)COLS};
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uint32_t tdim[] = {TILE_COLS, TILE_ROWS};
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uint32_t tstr[] = {1, TILE_COLS};
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CUtensorMap tma_desc_host;
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CUresult res = cuTensorMapEncodeTiled(
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&tma_desc_host, CU_TENSOR_MAP_DATA_TYPE_UINT16, 2,
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d_src, gdim, gstr, tdim, tstr,
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CU_TENSOR_MAP_INTERLEAVE_NONE,
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CU_TENSOR_MAP_SWIZZLE_NONE,
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CU_TENSOR_MAP_L2_PROMOTION_NONE,
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CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE
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);
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if (res != CUDA_SUCCESS) { printf("cuTensorMapEncodeTiled FAILED: %d\n", res); return 1; }
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printf("CUtensorMap created OK\n");
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CUtensorMap* d_tma_desc;
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cudaMalloc(&d_tma_desc, sizeof(CUtensorMap));
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cudaMemcpy(d_tma_desc, &tma_desc_host, sizeof(CUtensorMap), cudaMemcpyHostToDevice);
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int smem = 8 + 128 + DATA_BYTES + 256;
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tma_test_kernel<<<1, 32, smem>>>(d_tma_desc, d_dst);
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cudaError_t err = cudaDeviceSynchronize();
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if (err != cudaSuccess) { printf("CUDA ERROR: %s\n", cudaGetErrorString(err)); return 1; }
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cudaMemcpy(h_dst, d_dst, DATA_BYTES, cudaMemcpyDeviceToHost);
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int mismatches = 0;
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for (int i = 0; i < TOTAL; i++) if (h_src[i] != h_dst[i]) mismatches++;
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printf("Mismatches: %d / %d\n", mismatches, TOTAL);
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printf("Test %s\n", mismatches == 0 ? "PASSED" : "FAILED");
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cudaFree(d_src); cudaFree(d_dst); cudaFree(d_tma_desc);
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free(h_src); free(h_dst);
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return 0;
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}
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