a59d57e4d5
D1.5: Fix TMA store - use local_tile with pv_mma_tiler
2026-05-24 00:32:35 +00:00
a6bf31a22e
D1.5: Fix TMA store rank mismatch - use 2D sC_epi view
2026-05-24 00:31:45 +00:00
d316875145
D1.5: Implement correction epilog with get_tmem_load_op + get_smem_store_op paired atoms
...
- One-way: TMEM → registers (normalize) → SMEM → GMEM
- Eliminates TMEM round-trip error for O normalization
- O rescale (kt>0) still uses old atoms (fix later)
- Based on CUTLASS FMHA reference's correction_epilog pattern
2026-05-24 00:30:38 +00:00
8514a72ba0
D1.5: Replace TMEM round-trip normalize with correction epilog (one-way: TMEM→reg→SMEM→GMEM)
...
- Remove noop + normalize TMEM round-trips (3% error per trip)
- Use epilogue_tmem_copy_and_partition for TMEM→reg (paired atoms)
- Use epilogue_smem_copy_and_partition for reg→SMEM (paired atoms)
- Apply 1/row_sum normalization in register space (exact)
- TMA store from SMEM→GMEM (no TMEM write-back)
- Add iter_acc_early_release_in_epilogue attribute
- Update SMEM-P comments to reflect coordinate-indexed fallback
2026-05-24 00:24:24 +00:00
26de7254ad
D1.3: Fix LSE tensor layout for weakly congruent store
2026-05-24 00:16:22 +00:00
f259fafcae
D1.3: Add unnormalized debug test to isolate SMEM-P vs O round-trip error
2026-05-24 00:15:41 +00:00
b72062e47c
D1.3: Add SMEM-P write/read diagnostic
2026-05-24 00:13:28 +00:00
6d6b91dcb4
D1.3: Add SMEM-P vs TMEM-P comparison test
2026-05-24 00:10:18 +00:00
f1b8fef3a2
D1.3: Fix while loop in cotiled diag - precompute num_tmem_alloc_cols
2026-05-24 00:07:22 +00:00
921decb516
D1.3: Fix cotiled diagnostic - use proper MMA construction
2026-05-24 00:06:50 +00:00
25747675cf
D1.3: Add make_cotiled_copy diagnostic test
2026-05-24 00:05:48 +00:00
24bc318480
shit left dangling
2026-05-23 23:58:57 +00:00
d092a1743a
D1.3: Re-enable coordinate-indexed SMEM-P write with identity tensor coords
2026-05-23 23:26:46 +00:00
a17dca508d
D1.3: Revert to zero-fill for sP - need to verify sP→PV pipeline first
2026-05-23 23:26:07 +00:00
5be5d42e94
D1.3: Compute (m,k) directly from thread mapping instead of identity tensor
2026-05-23 23:24:54 +00:00
23964d28c0
D1.3: Add debug prints for SMEM-P coordinate mapping
2026-05-23 23:24:02 +00:00
1e5635b93f
D1.3: Add SMEM-P coordinate diagnostic test
2026-05-23 23:23:05 +00:00
e0a11e32f8
D1.3: Fix coord extraction - identity tensor stores (m,k) pairs as values
2026-05-23 23:21:15 +00:00
a7171fa5e1
D1.3: Fix coordinate indexing - tTMEM_LOADcS first mode is (32,1) nested tuple
2026-05-23 23:20:12 +00:00
df7bc40d37
D1.3: Direct coordinate-indexed SMEM-P write using tTMEM_LOADcS coords
...
Each softmax thread writes its P values to sP using the (m,k) coordinates
from tTMEM_LOADcS. The k coordinate is decomposed into (k0,k1,k2) to
match sP's ((128,16),1,(4,2)) layout. CuTeDSL tensor indexing handles
the swizzle automatically. No make_tiled_copy needed.
2026-05-23 23:19:21 +00:00
2bbe55b08c
D1.3: Use make_cotiled_copy for SMEM-P — custom TV layout from TMEM-load coords to sP
...
Per CUTLASS guidance:
- make_tiled_copy_C/D encode wrong invariants for this transfer
- Build custom R→S copy where TV map comes from tTMEM_LOADcS (softmax thread
ownership) and destination addresses come from sP layout (PV A-operand swizzled SMEM)
- Use composition(sP_2d_layout, p_coord_layout) for atom_layout_tv
- Start with scalar BF16 (16-bit) stores — vectorize later
- Zero-fill source for compile test, will fill with actual P values next
2026-05-23 23:17:30 +00:00
2e86ed939e
Add SMEM-P guidance request document for CUTLASS LLM consultation
2026-05-23 23:03:35 +00:00
029c21a2af
D1.3: Use const_expr for lse None check
2026-05-23 22:30:55 +00:00
1720a0e86b
D1.3: Fix LSE with const_expr, always create valid mLSE tensor
2026-05-23 22:30:14 +00:00
bce31176aa
D1.3: Try make_tiled_copy_C(qk_mma) for SMEM-P copy - zero-fill source for compile test
2026-05-23 22:29:10 +00:00
c80bd021c9
D1.3: Define SMEM-P copy atoms unconditionally (CuTeDSL scoping)
2026-05-23 22:28:12 +00:00
43bb501acb
D1.3: Use full sP (4D) for make_tiled_copy_D partition
2026-05-23 22:27:11 +00:00
06fd2f63e9
D1.3: SMEM-P via get_smem_store_op + make_tiled_copy_D
...
Uses the CUTLASS blackwell_helpers pattern:
- get_smem_store_op creates a SMEM store atom paired with the TMEM load
- make_tiled_copy_D uses the same thread partition as the TMEM load
- Softmax warps write P to sP using the same thread mapping they use for reading S
- MMA warp reads P from sP via pv_mma.make_fragment_A(sP)
- Replaces the zero-fill stub with a proper register→SMEM copy
2026-05-23 22:26:09 +00:00
c507d0640c
D1.3: Enhanced diagnostic - test QK C-fragment as source for make_tiled_copy_C
2026-05-23 22:24:15 +00:00
bf896c0894
D1.3: Skip fragment creation in diagnostic, just print layouts
2026-05-23 22:21:31 +00:00
0c435b3e51
D1.3: Fix diagnostic - use dummy ptr 0 for shape analysis
2026-05-23 22:20:16 +00:00
55caf8be38
D1.3: Fix sP allocation - p_smem_s.outer is already a layout
2026-05-23 22:19:11 +00:00
d1c600f599
D1.3: Fix layout diagnostic - compute c_major outside kernel
2026-05-23 22:17:54 +00:00
d3d0020b4e
D1.3: Layout diagnostic v2 - run inside JIT-compiled kernel
2026-05-23 22:16:57 +00:00
ec8fd1474c
D1.3: Fix layout diagnostic - remove JIT-dependent code
2026-05-23 22:15:47 +00:00
c3a7c30f20
D1.3: Layout diagnostic - print all QK C-fragment and PV A-operand shapes
2026-05-23 22:14:35 +00:00
b59aca4655
Update all .md files with D5a/D5b progress, tOrP0 fix, LSE formula
...
- README.md: Updated Stage status table (D1 🟡 , D5 🟢 ), D5 section with
D5a/D5b results, tOrP0 bug fix docs, new CuTeDSL constraints #11-12
- STAGE_D1.3.md: Added progress update - TMEM-P works, SMEM-P still blocked,
recommended next steps
- STAGE_D.md was already updated
2026-05-23 22:07:53 +00:00
9264023e3b
Update STAGE_D.md with D5b results: merge cos 0.961, LSE err=0.0
2026-05-23 21:45:22 +00:00
2ced9d0da7
D5b: Fix reference computation - use logsumexp for stable LSE, fix o_unnorm definition
2026-05-23 21:43:04 +00:00
2883e042ca
D5b MILESTONE: SWA+sink merge works! cos 0.969
...
- Run FMHA twice (compressed KV + SWA KV) with normalized O + LSE
- Merge with sink weights in Python
- LSE err=0.0, merge cos=0.969 PASS
- Update STAGE_D.md: D5b done, D5c/D5d are optimizations
2026-05-23 21:36:26 +00:00
70763030c0
D5b: Use normalized O + LSE for merge (correct formula), always output LSE
2026-05-23 21:35:40 +00:00
28949da6e4
D5b: Clean up merge test - stable formula for both ref and kernel
2026-05-23 21:33:45 +00:00
9e1859827f
D5b: Use reference per-row LSE for proper O normalization
2026-05-23 21:31:52 +00:00
48d37d652e
D5b: Fix kernel_obj reference
2026-05-23 21:30:59 +00:00
caf89c65bf
D5b: Fix syntax error
2026-05-23 21:30:00 +00:00
3dd9cd6a94
D5b: Debug reference formula mismatch, add numerically stable merge
2026-05-23 21:19:25 +00:00
98390df27e
D5b: Python SWA+sink merge test
...
- Run FMHA twice (compressed KV + SWA KV, normalize=False)
- Merge with sink weights in Python
- Verify end-to-end correctness vs FP32 reference
2026-05-23 21:18:06 +00:00
60e03fe84a
Update STAGE_D.md: D5a done, CG-2/CG-3 status updated, tOrP0 offset rule added
2026-05-23 21:16:52 +00:00
edc283e6c1
D5a: Fix LSE formula - lse = ln(row_sum) + row_max * ln(2)
...
row_max is in scale_log2 domain, need to convert to natural log domain.
attn_max = row_max * ln(2), so lse = ln(row_sum) + row_max * ln(2).
2026-05-23 21:15:14 +00:00
6ca294ed6d
D5a: Use tensor indexing for LSE write
2026-05-23 21:13:52 +00:00
