Commit Graph

830 Commits

Author SHA1 Message Date
568840ffc9 Fix v_fmha layout to use pv_n_tile instead of head_dim for multi-PV-tile support 2026-05-23 09:02:01 +00:00
6934b9b4b6 D1.4: Add pv_n_tile and n_pv_tiles for multi-PV-tile support (tcgen05 MMA max N=256) 2026-05-23 09:00:18 +00:00
3b98007093 diag: add 2-CTA check + fix LayoutEnum in MMA test 2026-05-23 08:45:26 +00:00
eca84bdcb5 fix: remove bad import in NVFP4 diag 2026-05-23 08:44:37 +00:00
1816965db8 fix: import ceil_div in quantize.py (was NameError at runtime) 2026-05-23 08:40:24 +00:00
cca62743df fix: use quantize_activation_nvfp4 in diag 2026-05-23 08:39:12 +00:00
96a43b60f3 fix: use correct API for NVFP4-0 diag (sf_vec_size + mma_tiler_mn) 2026-05-23 08:38:19 +00:00
2b86aca551 fix: use Sm100BlockScaledPersistentDenseGemmKernel in diag 2026-05-23 08:30:43 +00:00
e87ec6c07a fix: use randint+view for FP4/FP8 tensors in diag 2026-05-23 08:29:16 +00:00
44a917b277 fix: NVFP4-0 diag script — import SF_VEC_SIZE from quantize.py 2026-05-23 08:28:13 +00:00
c0c671e334 diag: NVFP4-0 primitive verification script 2026-05-23 08:26:56 +00:00
324fce3f63 docs: add NVFP4 precision roadmap to STAGE_D.md (3 honest buckets + speculative bucket) 2026-05-23 07:39:09 +00:00
4eccbb05c1 shit carmine left dangling 2026-05-23 06:55:22 +00:00
fe81eba7aa D1.2: TMEM budget verified on B200. Split-PV mandatory at hd=512 (MMA max N=256) 2026-05-23 06:43:01 +00:00
49d29aa1d2 D1.2: fix probe for hd=512 (MMA max N=256, use pv_n_tile) 2026-05-23 06:41:42 +00:00
5b93a41250 D1.2: simplify TMEM budget probe, fix printf args 2026-05-23 06:40:55 +00:00
d5273b7f4f fix: cuda.CUstream import 2026-05-23 06:40:05 +00:00
39311133d6 D1.2: TMEM budget probe using @cute.jit for MLIR context 2026-05-23 06:39:27 +00:00
25a08f5de2 fix: remove unused v_fmha_layout from probe 2026-05-23 06:38:08 +00:00
de277f08ac D1.2: TMEM budget probe with real tensor major modes 2026-05-23 06:37:34 +00:00
7af31d46be fix: OperandMajorMode.MN not .M 2026-05-23 06:36:39 +00:00
760d120b1c fix: typo + OperandMajorMode for TMEM budget probe 2026-05-23 06:35:55 +00:00
df3708e3e2 fix: LayoutEnum import from cutlass.utils 2026-05-23 06:35:03 +00:00
241aa0f334 fix import path for tcgen05 2026-05-23 06:34:30 +00:00
44f8b4c5ce D1.2: TMEM budget probe script for hd=64,128,256,512 2026-05-23 06:33:26 +00:00
cdfafe50de fix: add SwiGLU clamping to fused kernel (paper §4.2.3, CG-1)
The fused SwiGLU kernel stored swiglu_limit but never applied it.
Paper §4.2.3: gate capped at swiglu_limit, linear clamped to [-limit, +limit].
Non-fused reference path already applies clamping correctly.
Fix: add fmin/fmax clamping in FP32 before BF16 conversion.
2026-05-23 06:32:54 +00:00
17b40eb3f8 STAGE_D.md: restructure with correctness gaps, TMEM budget, execution order 2026-05-23 06:31:37 +00:00
f30e7f5f43 D1.1: Fix make_fragment_A — use sP for SMEM source pv_mma 2026-05-23 06:04:44 +00:00
8b7b124295 D1.1: Fix PV A-operand construction — compile-time branch for TMEM vs SMEM 2026-05-23 06:03:27 +00:00
d7361fe9ae D1.1: Add SMEM-P path behind use_smem_p flag (stub: zero sP) 2026-05-23 06:01:02 +00:00
e19a5d02d2 D1.0: Replace HEAD_DIM=64 with self.head_dim constructor parameter 2026-05-23 05:55:03 +00:00
4f8a1b0eb5 Add STAGE_D.md: step-by-step runbook and todo list for D1-D5 2026-05-23 05:52:03 +00:00
a9adeb6e4a Rename FmhaV3StageC → FmhaKernel — no dev stage artifacts in production API 2026-05-23 05:45:58 +00:00
8f3aeed438 Update README: reflect Stage C migration, built indexer/router/compressor, SMEM-P path, CuTeDSL scoping lesson 2026-05-23 05:42:44 +00:00
0d3db00c44 Migrate Stage C kernel (proven cos 0.97) into module - exact copy, no modifications 2026-05-23 05:36:22 +00:00
a9449e9484 Fix TMEM-P offset calc: match Stage C with p_cols_fp32 from pv_mma_tiler[2] 2026-05-23 05:18:37 +00:00
88c8e49739 Add missing TMEM fence after P store in TMEM-P path 2026-05-23 05:17:45 +00:00
8deb987a3f Fix p_cols_fp32: use pv_mma_tiler[2] (K-dim) not [1] (N-dim) 2026-05-23 05:16:19 +00:00
963c35ea29 Fix PV A-operand major mode: K for TMEM-P, a_major for SMEM-P 2026-05-23 05:14:08 +00:00
7f1febccf0 Fix CuTeDSL scoping: hoist P store vars out of if block 2026-05-23 05:12:30 +00:00
d15bb7b84a Fix O rescale: use Stage C proven correction_rescale pattern 2026-05-23 05:10:46 +00:00
300482e40a Fix tOrP0 indexing: 3-dim slice (None,None,kb) not 4-dim 2026-05-23 05:09:19 +00:00
0b277f4199 Fix CuTeDSL scoping: unconditionally define tOrP0 and tCrP 2026-05-23 05:08:10 +00:00
03fd055be0 Fix CuTeDSL variable scoping: define tOrP0 and tCrP in both branches 2026-05-23 05:07:30 +00:00
531f1a12b4 Fix p_tmem_s: use ComposedLayout from make_smem_layout_a, pass as kernel arg 2026-05-23 05:06:45 +00:00
c5ed9e3119 Consolidate FMHA stages A/B/C into unified kernel module with SMEM-P stub 2026-05-23 05:04:43 +00:00
0c7a69cf34 WIP: make_tiled_copy_C for P→SMEM 2026-05-23 03:56:56 +00:00
abecc0bd77 fix: cpasync.CopyOp for reg→SMEM 2026-05-23 03:54:49 +00:00
9611d9bc19 fix: CopyAtomUniversalOp 2026-05-23 03:52:47 +00:00
cfe21685d1 WIP: tiled copy for P→SMEM (zero fill) 2026-05-23 03:51:58 +00:00