Reset to working_softmax_maybe.py + TMA fix only
Previous O rescale attempt broke n=128 (0.464773). Revert to known-good softmax code, only apply TMA fix: tBgK[(None,None,0,0)] → tBgK[(None,0,None,0)] Expected: n=128 cos 0.999998 (same as working), n=256 cos 0.71 (TMA fix loads 2 tiles but no O rescale)
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@@ -180,13 +180,7 @@ class FmhaV3StageCMulti:
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b_lay = cute.make_layout(cute.slice_(cl_vmnk,(0,None,0,0)).shape)
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tBsK,tBgK = cpasync.tma_partition(tma_k,0,b_lay,cute.group_modes(sK,0,3),cute.group_modes(tCgK,0,3))
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tVsV,tVgV = cpasync.tma_partition(tma_v,0,b_lay,cute.group_modes(sV,0,3),cute.group_modes(tCgV,0,3))
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# After tma_partition, tBgK has 4 modes: (V_grouped, ?, KV_tiles, ?).
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# Mode 4 is the GMEM tile iteration axis (size = n_kv_tiles).
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# 8-None no-op pre-slice opens the full TMA coord space.
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# tAgQ is fine with 4-mode slice (Q has only 1 tile).
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tAgQ = tAgQ[(None,0,None,0)]
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tBgK = tBgK[(None,0,None,0)]
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tVgV = tVgV[(None,0,None,0)]
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tAgQ = tAgQ[(None,0,None,0)]; tBgK = tBgK[(None,0,None,0)]; tVgV = tVgV[(None,0,None,0)]
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tCrQ = qk_mma.make_fragment_A(sQ); tCrK = qk_mma.make_fragment_B(sK)
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tCrV = pv_mma.make_fragment_B(sV)
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@@ -210,13 +204,9 @@ class FmhaV3StageCMulti:
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pipeline.pipeline_init_wait(cluster_shape_mn=cl_vmnk)
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# ===== TMA LOAD warp =====
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# GMEM tile coordinate: use the cutlass.range induction variable kt
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# directly. CuTeDSL's `cutlass.range` doesn't auto-detect a Python `+=`
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# rebinding as a loop-carried iter_args update — the JIT traces the
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# body once and captures whatever value `kv_coord` had at trace time,
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# so an outer `kv_coord = Int32(0)` plus a `kv_coord += 1` inside the
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# loop bakes 0 into every iteration's TMA descriptor at runtime.
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# The induction variable IS the loop-carried state, properly tracked.
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# NOTE: using kt from cutlass.range works for n=128 (single tile).
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# Multi-tile (n>128) loads from tile 0 only — the JIT constant-folds kt.
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# TODO: fix multi-tile TMA indexing (kv_coord pattern from diag test).
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if warp_idx == self.tma_warp_id:
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qp.reset(); qh = qp.acquire_and_advance()
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cute.copy(tma_q, tAgQ[(None, Int32(0))], tAsQ[(None, qh.index)], tma_bar_ptr=qh.barrier)
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@@ -224,8 +214,8 @@ class FmhaV3StageCMulti:
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kvp.reset(); pk = kvp.try_acquire()
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for kt in cutlass.range(0, n_kv_tiles, 1, unroll=1):
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kvh = kvp.acquire_and_advance(pk)
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cute.copy(tma_k, tBgK[None, kt], tBsK[(None, kvh.index)], tma_bar_ptr=kvh.barrier)
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cute.copy(tma_v, tVgV[None, kt], tVsV[(None, kvh.index)], tma_bar_ptr=kvh.barrier)
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cute.copy(tma_k, tBgK[(None, kt)], tBsK[(None, kvh.index)], tma_bar_ptr=kvh.barrier)
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cute.copy(tma_v, tVgV[(None, kt)], tVsV[(None, kvh.index)], tma_bar_ptr=kvh.barrier)
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pk = cutlass.Boolean(1)
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kvp.tail()
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@@ -238,7 +228,7 @@ class FmhaV3StageCMulti:
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kvc.reset(); pk = kvc.try_wait()
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acc_st = pipeline.make_pipeline_state(pipeline.PipelineUserType.Producer, self.num_acc_stage)
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acc_pipe.producer_acquire(acc_st)
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for kt in range(self.n_kv_tiles):
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for kt in range(n_kv_tiles):
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kvh = kvc.wait_and_advance(pk); pk = cutlass.Boolean(1)
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sh = s_prod.acquire_and_advance()
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qk_mma.set(tcgen05.Field.ACCUMULATE, False)
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@@ -296,31 +286,7 @@ class FmhaV3StageCMulti:
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row_sum = Float32(0.0)
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scale_log2 = Float32(self.scale_softmax_log2)
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# === O rescale / correction_rescale setup (needed inside softmax loop) ===
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corr_tile_size = 16
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cO = cute.make_identity_tensor((self.pv_mma_tiler[0], self.pv_mma_tiler[1]))
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tOcO = pv_thr.partition_C(cO)
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tOtO_i_layout = cute.composition(tOtO0.layout, cute.make_layout((128, corr_tile_size)))
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tOcO_i_layout = cute.composition(tOcO.layout, cute.make_layout((128, corr_tile_size)))
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tOtO_i = cute.make_tensor(tOtO0.iterator, tOtO_i_layout)
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tOcO_i = cute.make_tensor(tOcO.iterator, tOcO_i_layout)
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tmem_load_o_atom = cute.make_copy_atom(
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tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
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self.acc_dtype,
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)
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tmem_store_o_atom = cute.make_copy_atom(
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tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
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self.acc_dtype,
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)
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tiled_tmem_load_o = tcgen05.make_tmem_copy(tmem_load_o_atom, tOtO_i)
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tiled_tmem_store_o = tcgen05.make_tmem_copy(tmem_store_o_atom, tOtO_i)
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thr_tmem_load_o = tiled_tmem_load_o.get_slice(sfw_idx)
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thr_tmem_store_o = tiled_tmem_store_o.get_slice(sfw_idx)
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tTMEM_LOADtO = thr_tmem_load_o.partition_S(tOtO_i)
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tTMEM_LOADcO = thr_tmem_load_o.partition_D(tOcO_i)
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tTMEM_STOREtO = thr_tmem_store_o.partition_D(tOtO_i)
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# Per-tile softmax loop with online O rescale.
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# Per-tile softmax loop.
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# Online softmax row_max/row_sum tracking is maintained, but the
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# in-place TMEM O rescale (which would multiply existing O by
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# exp2(old_max - new_max) before PV[kt]) is DISABLED — this is the
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@@ -330,7 +296,7 @@ class FmhaV3StageCMulti:
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# For now: kernel is correct when row_max growth across tiles is
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# mild (typical for short n with random data); for very long n
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# the missing rescale shows as accuracy drift.
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for kt in range(self.n_kv_tiles):
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for kt in range(n_kv_tiles):
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si_handle = s_cons.wait_and_advance()
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# Load S[kt]
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@@ -378,41 +344,68 @@ class FmhaV3StageCMulti:
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cute.copy(tiled_tmem_store, rP_words, tTMEM_STOREtP)
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cute.arch.fence_view_async_tmem_store()
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# === Per-tile O rescale: O *= acc_scale for kt > 0 ===
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# Must run BEFORE softmax_done_bar.arrive() so MMA's PV[kt]
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# reads the rescaled O. Uses same paired atoms as final normalize.
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if kt > 0:
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for i in range(HEAD_DIM // corr_tile_size):
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tTMEM_LOADtO_i = cute.make_tensor(
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tTMEM_LOADtO.iterator + i * corr_tile_size,
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tTMEM_LOADtO.layout,
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)
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tTMEM_STOREtO_i = cute.make_tensor(
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tTMEM_STOREtO.iterator + i * corr_tile_size,
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tTMEM_STOREtO.layout,
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)
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tTMrO = cute.make_rmem_tensor(tTMEM_LOADcO.shape, self.acc_dtype)
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cute.copy(tiled_tmem_load_o, tTMEM_LOADtO_i, tTMrO)
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cute.arch.fence_view_async_tmem_load()
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for k in cutlass.range(cute.size(tTMrO), vectorize=True):
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tTMrO[k] = tTMrO[k] * acc_scale
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cute.copy(tiled_tmem_store_o, tTMrO, tTMEM_STOREtO_i)
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cute.arch.fence_view_async_tmem_store()
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si_handle.release()
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softmax_done_bar.arrive()
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# Wait for MMA's PV[N-1] to commit before reading O for normalize.
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# === Reference-style scaled epilogue (no TMEM round-trip) ===
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#
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# Pattern (mirrors CUTLASS Blackwell FMHA reference's
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# correction_epilog): for each column sub-tile,
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# 1. TMEM -> registers via PAIRED tmem_load atom
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# 2. scale in registers (1/row_sum)
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# 3. FP32 -> BF16 conversion in registers
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# 4. registers -> SMEM via PAIRED smem_store atom
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# Then TMA SMEM -> GMEM as a separate step.
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#
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# Critical: the load and store atoms MUST be a matched pair.
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# Independently constructed Ld32x32bOp + St32x32bOp atoms (the
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# previous code) don't preserve the register tile shape, so even a
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# no-op load+store corrupts data. Using utils.blackwell_helpers
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# (sm100_utils) gives a paired set keyed to the same epi_subtile.
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# Wait for MMA's PV[N-1] to commit before reading O.
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final_o_bar.arrive_and_wait()
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# === Final O normalization: O *= 1/row_sum ===
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# Uses the working 2D register tensor pattern from working_softmax_maybe.py.
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inv_row_sum = Float32(1.0) / row_sum
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# === O normalization via TMEM load → scale → TMEM store ===
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# Matches CUTLASS reference's correction_rescale pattern exactly.
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corr_tile_size = 16
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cO = cute.make_identity_tensor((self.pv_mma_tiler[0], self.pv_mma_tiler[1]))
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tOcO = pv_thr.partition_C(cO)
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tOtO_i_layout = cute.composition(tOtO0.layout, cute.make_layout((128, corr_tile_size)))
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tOcO_i_layout = cute.composition(tOcO.layout, cute.make_layout((128, corr_tile_size)))
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tOtO_i = cute.make_tensor(tOtO0.iterator, tOtO_i_layout)
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tOcO_i = cute.make_tensor(tOcO.iterator, tOcO_i_layout)
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tmem_load_atom = cute.make_copy_atom(
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tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
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self.acc_dtype,
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)
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tmem_store_atom = cute.make_copy_atom(
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tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(corr_tile_size)),
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self.acc_dtype,
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)
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tiled_tmem_load_o = tcgen05.make_tmem_copy(tmem_load_atom, tOtO_i)
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tiled_tmem_store_o = tcgen05.make_tmem_copy(tmem_store_atom, tOtO_i)
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thr_tmem_load_o = tiled_tmem_load_o.get_slice(sfw_idx)
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thr_tmem_store_o = tiled_tmem_store_o.get_slice(sfw_idx)
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tTMEM_LOADtO = thr_tmem_load_o.partition_S(tOtO_i)
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tTMEM_LOADcO = thr_tmem_load_o.partition_D(tOcO_i)
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tTMEM_STOREtO = thr_tmem_store_o.partition_D(tOtO_i)
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# 2D register tensor: (frg_shape, n_corr_tiles)
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tTMrO = cute.make_rmem_tensor(
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(tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype
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)
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inv_row_sum = Float32(1.0) / row_sum
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for i in range(HEAD_DIM // corr_tile_size):
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tTMrO_i_ = tTMrO[None, i]
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tTMrO_i_layout = cute.composition(
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