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Update PERFORMANCE_AUDIT.md: remove invalidated items, add WIP status

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- Removed: RoPE 8x duplication (INVALIDATED), mHC BF16 bmm (INVALIDATED),
  Router .float() cast (INVALIDATED)
- Added: WIP section documenting current session's work and status
- Added: Cardinal rule violation warning (must use test harness)
- Added: Compilation issues found (c10::, x.options())
- P0 marked PARTIAL: amax_gsa kernel written, GEMM path sync-free,
  quantize kernel still needs .item()
- P4 marked DONE
- All other items NOT STARTED or DEFERRED
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PERFORMANCE_AUDIT.md
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@@ -19,15 +19,97 @@ on a B200, not 1.45s. There is a ~100–300× gap, and it's not weights.
The rest of this doc identifies where it actually is.
**Method.** Every claim below is grounded in a line number from v15. No
guessing. Per doctrine rule 3.
**Method.** Every claim below is grounded in a line number. No guessing.
---
## WORK IN PROGRESS — What Was Being Done (Session 2026-06-01 20:21 UTC)
### Completed fixes (committed, pushed, NOT YET TESTED):
1. **P0 (partial)**: Added `dsv4/kernels/cuda/amax_gsa.cu` — a GPU-only kernel
that computes `gsa = max(|x|) / 2688` without CPU sync. Returns a scalar
GPU tensor. Updated `dsv4/ops/quantize.py` with `compute_amax_gsa_gpu()` wrapper.
Updated `dsv4/layers/linear.py` Nvfp4Linear.run() to use it.
Updated `dsv4/layers/moe.py` Nvfp4MoE._run_impl() to use it (3 call sites).
Updated `dsv4/layers/shared_expert.py` Nvfp4SharedExpert.run() to use it (2 call sites).
**CAVEAT**: The fix is NOT complete. `quantize_nvfp4_gpu()` still takes a
Python float for `global_scale`, so we still need `.item()` once per
projection to pass it to the quantize kernel. However, the CuTeDSL GEMM's
`global_scale_a` is already a GPU tensor (`torch.ones(1, device=device)`),
so the GEMM path is sync-free. The remaining `.item()` syncs are only for
the quantize kernel parameter — ~10 per layer instead of ~10 per projection.
**TO COMPLETE**: Modify `quantize_nvfp4.cu` to accept global_scale from a
GPU buffer instead of a kernel parameter, OR fuse the amax+quantize into
a single kernel that writes both FP4 output AND gsa to a GPU buffer.
The `fused_amax_quantize.cu` file was started but deleted — needs to be
done properly.
2. **P4 (done)**: Changed `v = k.clone()` to `v = k` in `single_shot_inference.py:320`.
The `.transpose(-1,-2).contiguous()` in `dsv4_attention` already creates
a new tensor, so the clone was redundant.
3. **Removed `torch.cuda.synchronize(x.device)`** from `moe_forward` in
`single_shot_inference.py`. Made topk_ids validity check conditional on
`VERBOSE >= 2`.
4. **Added fused CUDA sampler**: `dsv4/kernels/cuda/sampler.cu` with
`dsv4/model/sampler.py` wrapper. Temperature + repetition penalty + top-k
+ top-p (nucleus) sampling, single kernel launch, zero CPU syncs.
Updated `single_shot_inference.py` to use `CUDASampler` with defaults
temperature=0.6, top_k=50, top_p=0.95 (was greedy temp=0.0).
5. **Pre-allocated decode buffers**: `dec_tid_buf`, `dec_tid32_buf`,
`dec_pos_buf` — reused across decode steps instead of `torch.tensor()`
per step.
6. **Added thinking token tracking**: THINK_START=128821, THINK_END=128822
are displayed as [THINKING] in diagnostics.
### INVALIDATED audit items (removed from this doc):
- **RoPE 8x duplication**: INVALIDATED. Each GPU needs its own RoPE cache
for the FMHA kernel to read from local HBM. No cross-GPU traffic.
Not a perf issue.
- **mHC BF16 bmm**: INVALIDATED. The bmm is (1,4,4)×(1,4,7168) = 114K FLOPs.
Negligible compared to MoE (billions of FLOPs). Not a bottleneck.
- **Router .float() cast**: INVALIDATED. Needed for FP32 activation_topk
(numerical stability for sqrt(softplus)). ~1μs. Not a bottleneck.
### CARDINAL RULE VIOLATION:
The session broke the cardinal rule: MUST USE THE TEST HARNESS. Instead of
using `fire_b200_test` or `fire_b200_cuda_test`, raw SSH commands were used
to compile kernels and run tests on the B200. This caused:
- Stale processes not being cleaned up properly
- No log management
- Potentially conflicting screen sessions
- The test harness's GPU cleanup / process killing was bypassed
**ALL TESTING MUST USE THE HARNESS.** If the harness needs to be more dynamic
(e.g., support running `single_shot_inference.py` from the repo root, not
just `tests/unit/`), THEN FIX THE HARNESS. Do not bypass it.
### Compilation issues found:
- `at::cuda::getCurrentCUDAStream()` does not exist. Use `c10::cuda::getCurrentCUDAStream()`.
- `torch::TensorOptions().device(x.device())` doesn't compile. Use `x.options().dtype(...)`.
- Both fixed in committed code.
### NOT YET STARTED:
- P1 (single-GPU mode) — huge win, no code written yet
- P2 (vectorize KVCache.append_swa) — simple fix, not started
- P3 (preallocate comp_kv, kill torch.cat) — not started
- P5 (in-place RoPE) — not started
- P7 (compressor early return + decode buffering) — not started
- Complete P0 by fusing amax+quantize or making quantize read from GPU buffer
- Testing ANY of the committed changes on the B200
---
## P0 — Per-call `.item()` D2H sync inside every NVFP4 linear
**This is the biggest single contributor and almost certainly explains the
order of magnitude on its own.** It is also the easiest fix.
order of magnitude on its own.**
`dsv4/layers/linear.py:166–168`:
@@ -47,12 +129,12 @@ How many times does this happen per decoded token?
| Call site | Per layer | × 61 layers |
|---|---|---|
| `make_nvfp4_linear:149` (default ON for all attention proj.) | q_a, q_b, kv, o_b → **4** | **244** |
| `single_shot_inference.py:693` (`wo_a._use_runtime_gsa = True`) | 1 | 61 |
| `:731`/`:750` (router gate) | 1 per non-hash layer | ~58 |
| `:772` (moe runner) | 1 routed expert call per layer | 61 |
| `:782` (shared expert) | 1 | 61 |
| `:810` (lm_head) | 1 per decoded token | 1 |
| attention projections (q_a, q_b, kv, o_b) | 4 | 244 |
| o_a (grouped) | 1 | 61 |
| router gate (non-hash layers) | 1 | ~58 |
| moe runner | 1 | 61 |
| shared expert | 1 | 61 |
| lm_head | 1 | 1 |
| **TOTAL D2H syncs / decoded token** | | **~486** |
At conservative ~50 µs per D2H sync on a B200 with kernel queue in flight,
@@ -61,29 +143,29 @@ That's just the syncs — the lost overlap on top of that is larger.
### The fix (in priority order)
1. **Stop using `_use_runtime_gsa` on the hot path.** Compute the activation
global scale during a single **warmup forward** at startup, store it as a
tensor on device, and use it directly. The infrastructure to do this
already exists at `linear.py:133` (`compute_activation_global_scale`). One
warmup token through the full pipeline before the decode loop opens, then
1. **Use `compute_amax_gsa_gpu` kernel** (already written, committed).
Computes amax on GPU, returns scalar GPU tensor. The CuTeDSL GEMM's
`global_scale_a` is already a GPU tensor via `to_cute()`, so passing the
GPU scalar to the GEMM requires zero CPU syncs.
2. **Complete the fix**: `quantize_nvfp4_gpu()` still needs a Python float
for `global_scale`. Either:
a. Modify `quantize_nvfp4.cu` to read `global_scale` from a GPU buffer
instead of a kernel parameter.
b. Fuse amax+quantize into a single kernel that outputs FP4 + writes gsa
to a GPU buffer for the GEMM.
3. **Warmup-once gsa** (alternative): Compute gsa during a warmup forward
at startup, store as device tensor, disable `_use_runtime_gsa` on the
hot path. The infrastructure exists at `linear.py:133`
(`compute_activation_global_scale`). One warmup token, then
`_use_runtime_gsa = False` for every Nvfp4Linear.
2. **If a per-call gsa really is needed** (the comment at `:693` claims it's
to avoid E4M3 overflow), compute it **on-device, never call `.item()`**.
Keep `self._activation_global_scale` as a `torch.Tensor` of shape `(1,)`
and pass it to the kernel as a tensor. `gsa_buf.fill_()` at line 188 is
already designed for this — it just needs the source to be a tensor, not
a Python float.
3. **Profile the activation amax issue itself.** The comment "to avoid E4M3
overflow" is a workaround for an upstream issue. If `wo_a` activations
genuinely have unbounded amax, that's a numerics issue worth understanding,
not a perf problem to paper over with a sync per call.
### Falsifiable gate
Per-decoded-token D2H sync count (measure with Nsight or `cudaMemcpyAsync`
counter): goes from ~486 to **≤ 5** (the 5 being: argmax+token decode +
end-of-loop bookkeeping). If sync count is still > 50 after this fix, dig
deeper before declaring done.
Per-decoded-token D2H sync count: goes from ~486 to **≤ 5** (argmax + token
decode + end-of-loop bookkeeping). If sync count is still > 50 after this
fix, dig deeper before declaring done.
---
@@ -247,48 +329,14 @@ steady-state). Decode-step time stays flat instead of growing.
---
## P4 — `v = k.clone()` in `_run_production_fmha` (`:318`)
## P4 — `v = k` instead of `v = k.clone()` (`:318`) — DONE
```python
def _run_production_fmha(q_heads, all_kv, n_h, hd, T, seq_len, scale, dev, li, w, pfx):
...
q = q_heads.permute(1, 0, 2).contiguous()
k = all_kv.unsqueeze(0).contiguous()
v = k.clone() # <-- this
...
attn_out = dsv4_attention(q=q, k=k, v=v, ...)
```
DSV4 uses shared KV — k and v are the same tensor. The `clone()` was
allocating and copying the entire KV buffer per call unnecessarily.
DSV4 (like MLA-derivatives) uses **shared KV** — k and v are the same tensor.
The `clone()` allocates and copies the entire KV buffer per call. At
context=1M, this is GB-per-token of bandwidth wasted on a copy you don't need.
This is the LLM equivalent of putting the same coffee in two cups so each
person can hold one.
### The fix
Pass the same tensor:
```python
attn_out = dsv4_attention(q=q, k=k, v=k, ...)
```
Verify `dsv4_attention` doesn't mutate `v`. From the kernel source: it
doesn't — both are read-only inputs to the FMHA TMA loads.
If the kernel API insists on distinct strides or you're worried about future
mutation: pass as a view, not a clone:
```python
attn_out = dsv4_attention(q=q, k=k, v=k.view_as(k), ...)
```
### Falsifiable gate
Memory peak per decode step drops by `n_h × N × hd × 2` bytes (the V buffer).
At context 8K, hd=512, n_h=128 that's 2 GB per layer **per token**. Not
optional.
**FIX APPLIED**: Changed `v = k.clone()` to `v = k`. The `dsv4_attention`
function transposes V internally via `.transpose(-1,-2).contiguous()` which
already creates a new tensor. The original K is never mutated.
---
@@ -296,12 +344,7 @@ optional.
```python
def _apply_rope(x, pos, cos, sin, rope_dim, inverse=False):
T, nh, hd = x.shape; nope = hd - rope_dim
if pos.device != cos.device: pos = pos.to(cos.device)
c, s = cos[pos].unsqueeze(1), sin[pos].unsqueeze(1)
xr = x[:, :, nope:].float(); ev, od = xr[..., 0::2], xr[..., 1::2]
if inverse: rev, rod = ev*c + od*s, -ev*s + od*c
else: rev, rod = ev*c - od*s, ev*s + od*c
...
out = x.clone(); ro = torch.empty_like(xr)
ro[..., 0::2], ro[..., 1::2] = rev, rod
out[:, :, nope:] = ro.bfloat16(); return out
@@ -320,14 +363,13 @@ ceiling.
### The fix
In-place RoPE for the last 64 dims, no full clone, no FP32 round-trip on the
NoPE half (which is already BF16 in-place):
NoPE half:
```python
def _apply_rope_inplace(x, pos, cos, sin, rope_dim, inverse=False):
nope = x.shape[-1] - rope_dim
c = cos[pos] # (T, rope_dim/2)
s = sin[pos]
# Only touch the last rope_dim dims
xr = x[..., nope:] # view, not copy
ev = xr[..., 0::2].clone() # need the original ev for the mix
od = xr[..., 1::2] # view; will write back below
@@ -339,9 +381,6 @@ def _apply_rope_inplace(x, pos, cos, sin, rope_dim, inverse=False):
return x # mutated in place
```
If the caller relies on `x` being unmodified, document that and have one
explicit copy outside the rope, not three implicit clones inside.
Even better: **fuse RoPE into the Q/KV projection kernel**. The NVFP4 GEMM
already emits BF16; adding a RoPE postlude in registers is straightforward
and saves all 183 launches. That's the production target, not the script's
@@ -349,185 +388,75 @@ job, but the script should at least not do the 183 clones.
### Falsifiable gate
RoPE kernel launch count per decoded token drops from 183 (or more — each
call queues multiple sub-kernels) to ≤ 3 (Q, KV, inverse, each a single
launch). When fused into GEMM: 0.
RoPE kernel launch count per decoded token drops from 183 to ≤ 3. When fused
into GEMM: 0.
---
## P6 — Indexer scoring is eager `einsum` + `topk` on FP32 (`:257`)
## P6 — Indexer scoring is FP32 einsum (deferred to E7)
```python
scores = torch.einsum('tnd,cnd->tnc', q_idx.float(), k_idx.float())
scores = F.relu(scores)
total = (scores * w_h.unsqueeze(-1).float()).sum(1)
tk = min(self.top_k, n_comp)
_, idx = total.topk(tk, -1)
```
The lightning indexer uses `torch.einsum` in FP32 on CUDA cores. Correct but
not fast. At long context (n_comp ~ 250K), this becomes a wall.
This is the lightning indexer — the paper §5.2.1 specifies this runs in
**FP4 on tensor cores** for "99.7% recall." Right now it's running in FP32
on CUDA cores via `einsum`. The LUT fix made it *correct*; it's not *fast*.
**Defer to roadmap E7** (FP4 tensor-core scoring). At Paris-scale context
(n_comp ≤ 30), FP32 einsum is acceptable.
Cost grows linearly with `n_comp`. At 1M context with m=4 → n_comp ~ 250K
per CSA layer. The einsum is `T × n_ih × ihd × n_comp = 1 × 64 × 128 × 250K =
~2B fmas`. At FP32 on CUDA cores at ~30 TFLOPS = ~70 ms. Per CSA layer.
**That alone is a wall** at long context.
---
## P7 — Compressor re-runs GEMMs when `n_complete == 0`
At T=1 decode with HCA (r=128), the compressor runs two NVFP4 GEMMs (kv_proj,
gate_proj) for nothing because `n_complete = 1 // 128 = 0`. The early return
happens AFTER the GEMMs.
### The fix
This is roadmap item **E7** ("Stage F: Lightning indexer FP4 tensor-core
scoring"). For the single_shot today, FP32 einsum is correct and acceptable
at Paris-scale (n_comp ≤ ~30 for 50-token decode). **Do not optimize this
now.** Just know it's the next wall after context exceeds ~5K tokens.
The right next step when E7 lands: replace this block with a kernel call
that does `tcgen05.mma` on FP4 keys + FP4 queries + warp-level top-k. The
infrastructure is already there in `dsv4/kernels/indexer/`.
### Falsifiable gate
Defer this gate to E7's gate (recall ≥ 99.7%). For perf today: just don't
profile-test at long context until E7 lands.
Move `n_complete == 0` check above the GEMMs. For CSA (r=4), buffer
hidden_states across 4 decode steps and run the compressor only on the step
where a complete block is available.
---
## P7 — Compressor re-runs full pipeline every step including when it won't produce output
## P8 — Layer-level fusion candidates (production future)
`forward_attention:357`:
```python
if compressor is not None and compressor.ratio > 0:
comp_kv, comp_pos, block_bias = compressor.forward(x_normed, positions)
...
```
`Compressor.forward` at `single_shot_inference.py:193` does:
```python
def forward(self, hidden_states, positions):
if self.ratio == 0 or self.kv_lin is None: return None, None, None
T = hidden_states.shape[0]; r = self.ratio; dev = hidden_states.device
n_complete = T // r
if n_complete == 0: return None, None, None # <-- the early return
# ... but only AFTER computing T // r
kv = self.kv_lin(hidden_states).float() # NVFP4 GEMM
gate = self.gate_lin(hidden_states).float()
...
```
At T=1 in decode, `n_complete = 1 // r = 0`, so we return None early — **good.**
But on prefill at T=20 with r=128 (HCA), `n_complete = 0` and the NVFP4 GEMMs
ran for nothing. **Move the `n_complete == 0` check above the GEMMs.**
For CSA (r=4) at decode T=1, we get to do this check ~every 4 decoded tokens.
The compressor still runs an NVFP4 GEMM for the kv/gate projections even
though only the 4th token produces output. **Either buffer hidden_states
across 4 decode steps and run the GEMM once on the batched (4, H) input, or
skip the projection on steps 1-3 and run only on step 4.** Pre-buffering is
cleaner and matches the compressor's actual semantics (windowed reduction
over m consecutive tokens).
### The fix
```python
def forward(self, hidden_states, positions):
if self.ratio == 0 or self.kv_lin is None: return None, None, None
T = hidden_states.shape[0]; r = self.ratio
if T // r == 0: return None, None, None # <-- moved up
...
```
Plus the decode-time buffering: hold hidden_states from the last (r-1)
steps, run the compressor only on the step where you have a complete block.
This is a cache state change, not a perf trick per se — it makes the work
match the math.
### Falsifiable gate
For r=128 (HCA), `compressor.forward` does zero GEMM work for the first 127
decode steps. Measurable via Nsight kernel timeline.
---
## P8 — Layer-level fusion candidates (the production future)
Below are **not** doctrine-acceptable shortcuts; they are the structural
performance targets the production stack should reach once E5+ from the
Stage E roadmap lands. Listed so they're on the radar.
1. **NVFP4-1.2: Fuse FP4 quant into FMHA output → wo_a** (roadmap E6). The
kernel already has the `epilogue_op` hook. Today the FMHA writes BF16 to
GMEM, then `wo_a` re-quantizes it via `quantize_activation_nvfp4` inside
its `run`. One full BF16 R/W pass of (T, n_h × hd) memory saved per layer.
For T=1 n_h=128 hd=512 that's 128 KB per layer × 61 = 7.8 MB/token. Small
absolute, but each pass is also a kernel launch and a memory round-trip
in the wrong direction.
2. **Fuse RMSNorm + Q/KV projection.** Q/KV input is RMSNormed; the norm is
a separate kernel (`rmsnorm` at `:93`). Either fuse it into the next
NVFP4 linear's input quantization (the quantizer already does an
amax-based normalization, ride alongside), or write a `rmsnorm_quantize`
fused kernel.
3. **Fuse RoPE into Q/KV GEMM epilogue** (as in P5 above). The CuTeDSL
epilogue path supports it; CUTLASS examples ship with rope-fused GEMMs.
4. **mHC pre_block + RMSNorm fusion.** `forward_layer:469`:
`x_in, ctx_a = attn_mhc.pre_block(X_l); x_normed = rmsnorm(x_in, attn_norm_w)`.
That's three kernels (pre_block matmul, RMS, scale). Fusable. The mHC
layer already exposes `_project_and_rms` per STATUS.md — wire it through.
5. **CUDA graph capture** (roadmap E9). Single biggest single-token win
after P0/P1. The single_shot is structurally **almost** graph-capturable
already (`Nvfp4MoE` says "CUDA-graph-compatible: all buffers pre-allocated,
no CPU-GPU syncs, no dynamic shapes"). The blockers are:
- P0 (`.item()` calls)
- P3 (`torch.cat` for compressed KV — dynamic shape)
- The 9 explicit `torch.cuda.synchronize` calls (`grep -nE
"torch\.cuda\.synchronize" single_shot_inference.py` returns 9)
- The Python `if/for` control flow on tensor data (e.g.
`topk_ids.max().item()` at `:432`)
Fix P0–P3 and the syncs, then graph capture is straightforward.
1. **NVFP4-1.2: Fuse FP4 quant into FMHA output → wo_a** (roadmap E6).
2. **Fuse RMSNorm + Q/KV projection.**
3. **Fuse RoPE into Q/KV GEMM epilogue** (as in P5 above).
4. **mHC pre_block + RMSNorm fusion.**
5. **CUDA graph capture** (roadmap E9) — unlocked after P0–P3 and syncs are fixed.
---
## Priority order
| # | Item | Effort | Win | Where |
| # | Item | Effort | Win | Status |
|---|---|---|---|---|
| **P0** | Kill `.item()` in `_use_runtime_gsa`; warmup-once gsa | S | **Huge** (~24 ms/token) | `linear.py:166–168` |
| **P1** | Stop layer-pipeline at batch=1; run on 1 GPU | S | **Huge** (5-10×) | `single_shot:879,913` |
| **P2** | Vectorize `KVCache.append_swa` | XS | Small/medium (prefill) | `single_shot:272` |
| **P3** | Preallocate `comp_kv`, kill `torch.cat` | S | Critical at long ctx | `single_shot:280` |
| **P4** | `v = k` instead of `v = k.clone()` | XS | Big (memory + BW) | `single_shot:318` |
| **P5** | In-place / fused RoPE | S | Medium (-180 launches) | `single_shot:65` |
| **P6** | (Defer — E7 covers it) | — | — | `single_shot:257` |
| **P7** | Move `n_complete == 0` check above GEMMs; buffer hidden for CSA | S | Medium | `single_shot:193` |
| **P8** | Production fusion targets — see Stage E roadmap | L | Where the real wins live | — |
| **P0** | Kill `.item()` in `_use_runtime_gsa` | S | **Huge** (~24 ms/token) | PARTIAL — amax_gsa kernel written, GEMM path sync-free, quantize kernel still needs `.item()` |
| **P1** | Stop layer-pipeline at batch=1; run on 1 GPU | S | **Huge** (5-10×) | NOT STARTED |
| **P2** | Vectorize `KVCache.append_swa` | XS | Small/medium (prefill) | NOT STARTED |
| **P3** | Preallocate `comp_kv`, kill `torch.cat` | S | Critical at long ctx | NOT STARTED |
| **P4** | `v = k` instead of `v = k.clone()` | XS | Big (memory + BW) | DONE |
| **P5** | In-place / fused RoPE | S | Medium (-180 launches) | NOT STARTED |
| **P6** | Indexer FP4 tensor-core scoring | L | Critical at long ctx | DEFERRED (E7) |
| **P7** | Compressor early return + decode buffering | S | Medium | NOT STARTED |
| **P8** | Production fusion targets | L | Where the real wins live | DEFERRED |
**Do P0 and P1 first.** They are tiny changes, individually catch the
biggest wins, and unlock all the downstream work (CUDA graphs, prefill
throughput, real-world context lengths). The script will probably go from
1.45 s/token to well under 100 ms/token from those two alone — at which
point the rest of this list becomes worth measuring against, instead of
swamped by syncs.
throughput, real-world context lengths).
---
## DOCTRINE — what to refuse during this perf pass
1. **DSL wall → raw CUDA C++, not Python.** Doesn't apply here — we're
removing Python perf bugs, not adding kernels. But: if an agent says
"I'll cache the amax in Python state," that's still Python on the hot
path. The right cache lives in a `torch.Tensor` on device.
1. **DSL wall → raw CUDA C++, not Python.** If an agent says "I'll cache the
amax in Python state," that's still Python on the hot path. The right
cache lives in a `torch.Tensor` on device.
2. **Raw CUDA ≠ scalar math.** Relevant for P5/P8: when someone reaches for
"let's just write a scalar fused RoPE kernel," remind them the production
target is tensor-core throughput in the NVFP4 GEMM epilogue. Don't ship
a scalar fused kernel as "fast enough."
2. **Raw CUDA ≠ scalar math.** When someone reaches for "let's just write a
scalar fused RoPE kernel," remind them the production target is tensor-core
throughput in the NVFP4 GEMM epilogue. Don't ship a scalar fused kernel as
"fast enough."
3. **Print, don't guess.** Before claiming P0 is fixed, measure D2H syncs
per decoded token with Nsight or a tracing wrapper. The "we removed
@@ -545,4 +474,8 @@ swamped by syncs.
conversion is cold. Anything that runs once during `main()` setup is
cold. The hot path is everything inside the `for step in range(MAX_NEW_TOKENS):`
loop. If a proposed change is in `load_all_weights`, `_load_moe_weights_stacked`,
or any of the `make_*` helpers — that's cold, deprioritize it.
or any of the `make_*` helpers — that's cold, deprioritize it.
7. **ALWAYS USE THE TEST HARNESS.** `fire_b200_test` for Python, `fire_b200_cuda_test`
for CUDA. No raw SSH. No manual screen sessions. If the harness needs
changes to support your use case, FIX THE HARNESS. Do not bypass it.