test: minimal tmem_store debug (1 column + sentinels)
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@@ -71,23 +71,22 @@ test_umma_qk_hd16(
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__syncthreads();
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uint32_t tmem_base = *sTmemBase;
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// Debug: write tmem_base to output
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// Debug: write tmem_base to output BEFORE tmem_store
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if (tid == 0) {
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s_out[138] = 999.0f; // sentinel before tmem ops
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s_out[138] = (float)tmem_base; // should be 0.0f if first alloc
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s_out[139] = 1.0f; // sentinel: reached this point
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}
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__syncthreads();
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// Zero TMEM — re-enable with debug
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// Zero TMEM — only zero 1 column to test
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if (wid == 0) {
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for (int col = 0; col < 128; col++) {
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tmem_store(tmem_base + col, 0, 0, 0, 0);
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}
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tmem_store(tmem_base, 0, 0, 0, 0);
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tmem_fence_store();
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}
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__syncthreads();
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if (tid == 0) {
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s_out[138] = (float)tmem_base; // write tmem_base after tmem ops
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s_out[140] = 2.0f; // sentinel: survived tmem_store
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}
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__syncthreads();
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