test: 32 threads (1 warp), no guards, all participate
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@@ -31,15 +31,15 @@ __global__ void test_tmem_2col(float* out) {
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int lane = threadIdx.x % WARP;
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int wid = threadIdx.x / WARP;
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// Alloc 32 TMEM columns
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if (wid == 0) {
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// Alloc 32 TMEM columns — all 32 threads (1 warp)
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{
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tmem_alloc(__cvta_generic_to_shared(sBase), 32);
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}
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__syncthreads();
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uint32_t tb = *sBase;
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// Store to columns 0 and 1 with fence between
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if (wid == 0) {
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// Store to columns 0 and 1
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{
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float v0 = (float)(lane * 4 + 0);
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float v1 = (float)(lane * 4 + 1);
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float v2 = (float)(lane * 4 + 2);
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@@ -47,12 +47,11 @@ __global__ void test_tmem_2col(float* out) {
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uint32_t u0, u1, u2, u3;
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memcpy(&u0, &v0, 4); memcpy(&u1, &v1, 4);
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memcpy(&u2, &v2, 4); memcpy(&u3, &v3, 4);
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tmem_store(tb + 0, u0, u1, u2, u3);
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}
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tmem_fence();
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__syncthreads();
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if (wid == 0) {
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{
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float v0 = (float)(lane * 4 + 100);
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float v1 = (float)(lane * 4 + 101);
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float v2 = (float)(lane * 4 + 102);
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@@ -65,20 +64,19 @@ __global__ void test_tmem_2col(float* out) {
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tmem_fence();
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__syncthreads();
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// Read back columns 0 and 1
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if (wid == 0) {
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// Read back
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{
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uint32_t r0, r1, r2, r3;
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tmem_load(tb + 0, r0, r1, r2, r3);
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float f0; memcpy(&f0, &r0, 4);
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if (lane == 0) out[0] = f0;
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tmem_load(tb + 1, r0, r1, r2, r3);
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float f1; memcpy(&f1, &r0, 4);
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if (lane == 0) out[1] = f1;
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}
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__syncthreads();
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if (wid == 0) tmem_dealloc(tb, 32);
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tmem_dealloc(tb, 32);
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}
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int main() {
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@@ -87,7 +85,7 @@ int main() {
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float* d_out; cudaMalloc(&d_out, 2 * sizeof(float));
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cudaMemset(d_out, 0, 2 * sizeof(float));
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test_tmem_2col<<<1, 64, 1024>>>(d_out);
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test_tmem_2col<<<1, 32, 1024>>>(d_out);
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cudaError_t err = cudaDeviceSynchronize();
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if (err != cudaSuccess) { printf("CUDA ERROR: %s\n", cudaGetErrorString(err)); return 1; }
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