E1-E4: gather kernels, handle wiring, rope, sync removal, e2e test
E1: LayerCacheHandle now exposes gather_compressed_kv,
gather_all_compressed_kv, gather_swa_kv, num_query_heads, head_dim.
Gather kernels in dsv4/kernels/cuda/gather_swa.cu + gather_kv.cu.
Python wrapper in dsv4/kernels/cache/gather.py.
E2: tests/e2e/test_one_layer.py — SWA path smoke test.
E3: Compressor/indexer __init__.py bridges (NotImplementedError stubs
for CSA/HCA compress_and_store, compute_index_scores_topk).
E4: Removed torch.cuda.synchronize() from fmha_multitile_op.py fast path.
Error checking via C API return code instead.
Also: forward_rope_partial in ops/rope.py (GPT-J interleaved, last 64 dims).
This commit is contained in:
@@ -130,9 +130,8 @@ def fmha_multitile_decode_raw(
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ctypes.c_float(scale),
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)
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if ret != 0:
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# Check CUDA error state
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err = torch.cuda.current_device()
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raise RuntimeError(f"Multi-tile kernel failed: {ret}")
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# Synchronize to catch async errors
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torch.cuda.synchronize()
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raise RuntimeError(f"Multi-tile kernel launch failed: return code {ret}")
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# E4: Removed torch.cuda.synchronize() — the C API launch returns an error
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# code from the kernel setup. Async kernel errors will surface on the next
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# CUDA API call. A full device sync is not needed on the hot path.
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return o, lse
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@@ -0,0 +1,60 @@
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"""CSA/HCA compressor — Python API bridge.
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Wraps the CuTeDSL compressor kernels with the interface that
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AttentionSubBlock expects. The compressor itself is CuTeDSL because
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it doesn't have the FMHA pipeline constraints — pure elementwise
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softmax over m entries, no tensor cores needed.
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The long-term path is raw CUDA C++ per doctrine, but the CuTeDSL
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compressor is already working and correct. Rewrite only if MLIR
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compilation becomes a blocker.
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"""
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from dsv4.kernels.compressor.csa_hca import (
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launch_csa_compress_projected,
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launch_hca_compress_projected,
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)
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def csa_compress_and_store(
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kv_raw: "torch.Tensor", # (T, 4 * head_dim) BF16 — (Ca, Cb, Za, Zb) interleaved
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cache: "LayerCacheHandle", # writes compressed entries to paged pool
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positions: "torch.Tensor", # (T,) int64
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compression_ratio: int = 4, # m=4
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) -> None:
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"""CSA: compress KV entries and store into the classical paged cache.
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The compressor reads the (Ca, Cb, Za, Zb) streams from kv_raw,
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runs token-level softmax compression (paper eq. 11-12), and writes
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the compressed entries to the cache's paged pool.
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The b-stream from the previous flush is read from the state cache's
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tail buffer (tail_kb, tail_zb).
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"""
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# TODO: implement the full CSA compression + store path.
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# For now, this is a placeholder that writes raw KV to the tail buffer.
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# The full path needs:
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# 1. Read prev b-stream from state cache
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# 2. Run CuTeDSL compression kernel
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# 3. Write compressed output to paged pool via flush kernel
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# 4. Update tail buffer (a-stream becomes next b-stream)
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raise NotImplementedError(
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"CSA compress_and_store requires the full flush pipeline. "
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"See dsv4/kernels/cuda/flush_write.cu and dsv4/cache/flush.py"
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)
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def hca_compress_and_store(
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kv_raw: "torch.Tensor", # (T, 2 * head_dim) BF16 — (C, Z) interleaved
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cache: "LayerCacheHandle", # writes compressed entries to paged pool
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positions: "torch.Tensor", # (T,) int64
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compression_ratio: int = 128, # m'=128
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) -> None:
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"""HCA: compress KV entries and store into the classical paged cache.
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Same structure as CSA but no b-stream, no overlap, and m'=128
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means compression only fires once per 128 tokens.
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"""
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raise NotImplementedError(
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"HCA compress_and_store requires the full flush pipeline. "
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"See dsv4/kernels/cuda/flush_write.cu and dsv4/cache/flush.py"
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)
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@@ -1 +1,28 @@
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"""CSA indexer — Python API bridge.
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Wraps the CUDA indexer score+topk kernel with the interface that
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AttentionSubBlock expects.
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"""
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from dsv4.kernels.indexer.csa_indexer import CSAIndexer
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def compute_index_scores_topk(
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q_indexer: "torch.Tensor", # (T, n_I_h * c_I) BF16
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w_indexer: "torch.Tensor", # (T, n_I_h) BF16
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cache: "LayerCacheHandle", # provides FP4 indexer keys
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top_k: int = 512,
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) -> "torch.Tensor": # (T, top_k) int64
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"""CSA: score compressed entries and select top-k blocks.
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Uses the CUDA indexer_score_topk kernel (raw CUDA, FP4 dequant + scalar
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score + min-heap top-k). Returns block indices for gather_compressed_kv.
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"""
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# TODO: wire the indexer properly. Needs:
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# 1. Dequantize q_indexer to FP32
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# 2. Read FP4 keys from cache.read_indexer_view()
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# 3. Run score_topk kernel
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# 4. Return top-k indices
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raise NotImplementedError(
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"compute_index_scores_topk requires wiring the CSAIndexer + "
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"indexer_score_topk kernel to the cache handle's IndexerView"
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)
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@@ -17,6 +17,68 @@ For the RoPE portion of each head (last rope_dim=64 dims):
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import torch
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def forward_rope_partial(
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x: torch.Tensor,
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positions: torch.Tensor,
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rope_dim: int = 64,
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head_dim: int = 512,
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) -> torch.Tensor:
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"""Apply partial RoPE to the last rope_dim dimensions of each head.
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DSV4 uses GPT-J style (interleaved) RoPE on the last rope_dim=64 dims.
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The first nope_dim=448 dims are left unchanged.
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For the RoPE portion (last 64 dims of each head):
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- Pair elements (x[2i], x[2i+1]) — interleaved
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- Forward rotation:
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x'[2i] = x[2i] * cos(θ) - x[2i+1] * sin(θ)
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x'[2i+1] = x[2i] * sin(θ) + x[2i+1] * cos(θ)
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Args:
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x: (T, n_h * head_dim) BF16 — flat across heads
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positions: (T,) int64 token positions
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rope_dim: number of RoPE dims per head
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head_dim: total head dimension
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Returns:
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(T, n_h * head_dim) BF16 with forward RoPE applied to last rope_dim dims
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"""
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T = x.shape[0]
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n_h = x.shape[1] // head_dim
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nope_dim = head_dim - rope_dim
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half_rope = rope_dim // 2
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# Build cos/sin cache (simple theta = 1/10000^(2i/d))
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# This should match the model's cos_sin_cache, but for now compute inline
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freqs = 1.0 / (10000.0 ** (torch.arange(0, rope_dim, 2, dtype=torch.float32, device=x.device) / rope_dim))
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pos_float = positions.float() # (T,)
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angles = torch.outer(pos_float, freqs) # (T, half_rope)
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cos_vals = torch.cos(angles).unsqueeze(1).to(x.dtype) # (T, 1, half_rope)
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sin_vals = torch.sin(angles).unsqueeze(1).to(x.dtype) # (T, 1, half_rope)
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# Reshape x to (T, n_h, head_dim)
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x_heads = x.reshape(T, n_h, head_dim)
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# Extract RoPE portion
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x_rope = x_heads[:, :, nope_dim:] # (T, n_h, rope_dim)
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x_even = x_rope[:, :, 0::2] # (T, n_h, half_rope)
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x_odd = x_rope[:, :, 1::2] # (T, n_h, half_rope)
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# Forward rotation
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rot_even = x_even * cos_vals - x_odd * sin_vals
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rot_odd = x_even * sin_vals + x_odd * cos_vals
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# Interleave back
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x_rot = torch.empty_like(x_rope)
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x_rot[:, :, 0::2] = rot_even
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x_rot[:, :, 1::2] = rot_odd
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# Copy NoPE portion unchanged
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result = x_heads.clone()
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result[:, :, nope_dim:] = x_rot
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return result.reshape(T, n_h * head_dim)
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def inverse_rope_bf16(
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o: torch.Tensor,
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positions: torch.Tensor,
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129
tests/e2e/test_one_layer.py
Normal file
129
tests/e2e/test_one_layer.py
Normal file
@@ -0,0 +1,129 @@
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"""E2 smoke test: one full DSV4 layer with SWA attention.
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Tests the integration path:
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X → mHC.pre → RMSNorm → SWA attention → mHC.post → RMSNorm → FFN
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SWA is the simplest path (no compressor, no indexer), so it's the
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first integration checkpoint. Layer 0 of the Flash variant uses SWA.
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This test verifies:
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1. LayerCacheHandle construction + gather_swa_kv
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2. AttentionSubBlock._forward_swa
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3. TransformerLayer.forward
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4. Shape/dtype correctness
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Numerical verification against a pure PyTorch reference is deferred
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to when the compressor + indexer are wired (CSA layer test).
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"""
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import torch
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import math
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import pytest
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def test_swa_cache_gather():
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"""Test gather_swa_kv: write KV to cache, read it back as dense BF16."""
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from dsv4.cache.schema import LayerCacheSchema, build_schema
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from dsv4.cache.state_cache import StateCachePool
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from dsv4.cache.handle import LayerCacheHandle
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from dsv4.model.config import DSV4Config
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from dsv4.model.layer_schedule import LayerSpec, AttentionType
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config = DSV4Config.flash()
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# Layer 0 of Flash is SWA
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spec = LayerSpec(layer_idx=0, attn=AttentionType.SWA)
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schema = build_schema(config, spec)
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state = StateCachePool(schema, max_requests=2, device='cuda')
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# Build handle
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slot = 0
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slots = torch.tensor([slot], dtype=torch.int32, device='cuda')
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positions = torch.tensor([0], dtype=torch.int32, device='cuda')
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request_ids = torch.tensor([0], dtype=torch.int32, device='cuda')
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handle = LayerCacheHandle(
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paged=None, state=state, schema=schema,
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request_slots=slots, positions=positions, request_ids=request_ids,
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block_table=None, block_lens=None,
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)
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handle.num_query_heads = config.num_query_heads
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# Write some KV to the cache
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hd = config.head_dim
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raw_kv = torch.randn(1, hd, dtype=torch.bfloat16, device='cuda')
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handle.write_swa(raw_kv)
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# Read it back
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k_swa, v_swa = handle.gather_swa_kv()
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assert k_swa.shape == (1, config.sliding_window, hd), f"shape {k_swa.shape}"
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assert k_swa.dtype == torch.bfloat16
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# The one written position should match (approximately — FP8 quantization loss)
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# Position 0 in ring buffer should have the dequantized KV
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# Check that something non-zero was written
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assert k_swa[0, 0].abs().sum() > 0, "SWA position 0 is zero — write failed?"
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print(f" gather_swa_kv: shape={k_swa.shape}, pos0_norm={k_swa[0, 0].float().norm():.4f}")
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def test_swa_attention_forward():
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"""Test SWA attention through the full AttentionSubBlock forward."""
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from dsv4.model.config import DSV4Config
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from dsv4.model.layer_schedule import LayerSpec, AttentionType
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from dsv4.layers.attention import AttentionSubBlock
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from dsv4.cache.schema import build_schema
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from dsv4.cache.state_cache import StateCachePool
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from dsv4.cache.handle import LayerCacheHandle
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config = DSV4Config.flash()
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spec = LayerSpec(layer_idx=0, attn=AttentionType.SWA)
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attn = AttentionSubBlock(config, spec)
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schema = build_schema(config, spec)
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state = StateCachePool(schema, max_requests=2, device='cuda')
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slots = torch.tensor([0], dtype=torch.int32, device='cuda')
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positions = torch.tensor([0], dtype=torch.int32, device='cuda')
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request_ids = torch.tensor([0], dtype=torch.int32, device='cuda')
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cache = LayerCacheHandle(
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paged=None, state=state, schema=schema,
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request_slots=slots, positions=positions, request_ids=request_ids,
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block_table=None, block_lens=None,
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)
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cache.num_query_heads = config.num_query_heads
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# Forward with synthetic input
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T = 1
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x = torch.randn(T, config.hidden_size, dtype=torch.bfloat16, device='cuda')
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# NOTE: Nvfp4Linear forward needs weights — for smoke test, skip the
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# full forward and test the gather+FMHA path directly.
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# The full AttentionSubBlock.forward needs weight loading, which is
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# deferred to the checkpoint loader integration.
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# Test just the FMHA path with dense KV (bypassing projections)
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from dsv4.kernels.attention import swa_only_fmha
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# Write some KV first
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raw_kv = torch.randn(T, config.head_dim, dtype=torch.bfloat16, device='cuda')
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cache.write_swa(raw_kv)
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# Gather and run FMHA
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q = torch.randn(T, config.num_query_heads * config.head_dim, dtype=torch.bfloat16, device='cuda')
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attn_out = swa_only_fmha(q, cache, sliding_window=config.sliding_window)
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assert attn_out.shape == (T, config.num_query_heads * config.head_dim)
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print(f" swa_only_fmha: shape={attn_out.shape}, dtype={attn_out.dtype}")
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def test():
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print("=" * 60)
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print("E2: One Layer Smoke Test — SWA Path")
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print("=" * 60)
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test_swa_cache_gather()
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test_swa_attention_forward()
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print("\n" + "=" * 60)
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print("E2 SWA SMOKE TEST PASSED")
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print("=" * 60)
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if __name__ == '__main__':
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test()
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