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@@ -121,6 +121,7 @@ static torch::Tensor get_mn_major_tma_aligned_packed_ue8m0_tensor_torch(const to
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const auto& options = torch::TensorOptions().device(sf.device()).dtype(torch::kUInt8);
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auto padded = torch::zeros({num_groups, aligned_mn, aligned_k}, options);
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// ReSharper disable once CppExpressionWithoutSideEffects
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padded.slice(1, 0, mn).slice(2, 0, k).copy_(ue8m0_tensor);
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padded = padded.view(-1).view(torch::kInt32).view({num_groups, aligned_mn, aligned_k / 4});
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@@ -140,8 +141,10 @@ static torch::Tensor get_mn_major_tma_aligned_packed_ue8m0_tensor(const torch::T
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at::TensorOptions().device(batched_sf.device()).dtype(torch::kInt));
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// Launch the kernel
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if (batched_sf.is_contiguous()) {
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// Fallback to slow PyTorch impl for non-supported cases
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if ((mn * sf_k) % 4 != 0 and num_groups > 1)
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return get_mn_major_tma_aligned_packed_ue8m0_tensor_torch(sf);
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constexpr int block_mn = 48;
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constexpr int num_threads = 512;
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const TransposeAndPackFP32IntoUE8M0Runtime::Args& args = {
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@@ -157,8 +160,10 @@ static torch::Tensor get_mn_major_tma_aligned_packed_ue8m0_tensor(const torch::T
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const auto& runtime = compiler->build("transpose_and_pack_fp32_into_ue8m0", code);
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TransposeAndPackFP32IntoUE8M0Runtime::launch(runtime, args);
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} else {
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// Fallback to slow PyTorch impl for non-supported cases
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if (mn % 4 != 0 or num_groups > 1)
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return get_mn_major_tma_aligned_packed_ue8m0_tensor_torch(sf);
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DG_HOST_ASSERT(mn % 4 == 0 and num_groups == 1);
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DG_HOST_ASSERT(batched_sf.stride(1) == 1 and batched_sf.stride(2) == mn);
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