Cyrus Leung 48a54c1e0d [CI/Build] Trigger processor tests on registry update (#35824) ...

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

2026-03-03 13:55:57 +08:00

..

hardware_tests

Change targets for AMD build in the "CI" pipeline (#34918)

2026-02-19 21:26:53 +00:00

image_build

[ci] Use the right tag for CPU arm64 image (#34915)

2026-02-19 19:59:15 -08:00

lm-eval-harness

[Rocm][CI] Fix LM Eval Large Models (H100) test group (#34750)

2026-03-02 07:43:38 +00:00

performance-benchmarks

[CI][BugFix] ShellCheck cleanup to remove baseline and preserve runtime behavior (#34514)

2026-02-17 12:22:56 +00:00

scripts

[ROCm][CI] Fix backslash-continuation in pytest marker re-quoting and treat exit code 5 as success (#35798)

2026-03-02 16:07:51 -08:00

test_areas

[CI/Build] Trigger processor tests on registry update (#35824)

2026-03-03 13:55:57 +08:00

.pipeline_gen_v2

[CI] minor fixes to pipeline generator and tests (#33151)

2026-01-27 17:04:02 -08:00

check-wheel-size.py

[CI] Raise VLLM_MAX_SIZE_MB to 500 due to failing Build wheel - CUDA 12.9 (#26722)

2025-10-14 10:52:05 -07:00

ci_config.yaml

[ci] Sync test areas with test-pipeline.yaml and enable new pipeline generator (#33080)

2026-01-26 12:28:20 -08:00

release-pipeline.yaml

[release] Minor fixes to release annotation and wheel upload (#33129)

2026-01-29 12:09:35 -08:00

test-amd.yaml

[CI/Build] Trigger processor tests on registry update (#35824)

2026-03-03 13:55:57 +08:00

test-pipeline.yaml

Deprecate test-pipeline.yaml (#34864)

2026-02-19 02:15:27 +00:00