rasmith b12f4a9830 [CI/Build][AMD] Use ROCM_ATTN instead of FLASH_ATTN test for test_register_kv_caches for ROCm and update test for TRITON_ATTN (#29985) ...

Signed-off-by: Randall Smith <ransmith@amd.com>
Co-authored-by: Randall Smith <ransmith@amd.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>

2025-12-05 20:57:38 -08:00

..

nixl_integration

[NIXL] fix cpu PD after physical <> logical block_size PR (#28904)

2025-11-18 14:03:23 -05:00

unit

[CI/Build][AMD] Use ROCM_ATTN instead of FLASH_ATTN test for test_register_kv_caches for ROCm and update test for TRITON_ATTN (#29985)

2025-12-05 20:57:38 -08:00

__init__.py

[Attention] MLA - Flashinfer Ragged Prefill (#20034)

2025-07-10 20:17:47 -07:00