zhangsicheng5 2108a571d7 [DCP] Support dcp kv_cache interleave size > 1 (#26696) ...

Signed-off-by: zhangsicheng5 <zhangsicheng5@huawei.com>
Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>
Signed-off-by: Qiu <qiuchunshuo@huawei.com>
Co-authored-by: QiuChunshuo <qiuchunshuo@huawei.com>

2025-11-09 04:45:27 +09:00

..

backends

[Chore] Separate out vllm.utils.importlib (#27022)

2025-10-17 00:48:59 +00:00

layers

[V0 deprecation] Remove VLLM_USE_V1 usage in most modules (#27955)

2025-11-04 20:51:16 -08:00

ops

[DCP] Support dcp kv_cache interleave size > 1 (#26696)

2025-11-09 04:45:27 +09:00

utils

[XPU] Add gpt-oss model support for Intel GPU (#27786)

2025-11-05 02:17:23 +00:00

__init__.py

Convert formatting to use ruff instead of yapf + isort (#26247)

2025-10-05 07:06:22 -07:00

layer.py

[Multimodal][XPU]Enable vision attn backend for xpu platform (#27525)

2025-11-01 04:45:02 +00:00

selector.py

[V0 deprecation] Remove VLLM_USE_V1 usage in most modules (#27955)

2025-11-04 20:51:16 -08:00