Kunshang Ji da14ae0fad [XPU][CI]disable lm cache uts (#28696) ...

Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>

2025-11-14 03:15:50 +00:00

..

hardware_ci

[XPU][CI]disable lm cache uts (#28696)

2025-11-14 03:15:50 +00:00

scheduled_integration_test

[CI Test] Add Scheduled Integration Test (#27765)

2025-10-30 17:29:26 -07:00

tpu

[TPU] update TPU benchmark threshold (#25713)

2025-10-07 13:53:09 -07:00

annotate-release.sh

[Build] Fix release pipeline failing annotation (#28272)

2025-11-07 10:06:45 -08:00

ci-clean-log.sh

[doc] improve ci doc (#19307)

2025-06-09 07:26:12 +00:00

cleanup-nightly-builds.sh

[CI] Push multiarch manifests as nightly builds (#25764)

2025-10-03 15:42:55 -07:00

rerun-test.sh

[doc] improve ci doc (#19307)

2025-06-09 07:26:12 +00:00

run-benchmarks.sh

[CI/Build] Replace vllm.entrypoints.openai.api_server entrypoint with vllm serve command (#25967)

2025-10-02 10:04:57 -07:00

run-multi-node-test.sh

[CI] Reorganize .buildkite directory (#16001)

2025-04-04 12:16:20 -07:00

run-prime-rl-test.sh

[CI/Build] add nightly prime-rl integration tests (#25207)

2025-09-24 08:44:22 +00:00

upload-wheels.sh

Update release pipeline for PyTorch 2.9.0 (#27303)

2025-10-22 09:18:01 +00:00