Li, Jiang 36d7f19897 [CPU] Support head_size 512 in cpu_attn (#38676) ...

Signed-off-by: jiang1.li <jiang1.li@intel.com>

2026-04-01 05:42:27 +00:00

..

micro_gemm

[CPU] Refactor CPU fused MOE (#30531)

2025-12-18 14:36:49 +08:00

sgl-kernels

[CPU] Support int8 compute mode in CPU AWQ (#35697)

2026-03-31 15:27:37 +08:00

activation.cpp

[Kernel][CPU] Add Quick gelu to CPU (#5717)

2024-06-21 06:39:40 +00:00

cpu_arch_macros.h

[CPU] Refactor CPU fused MOE (#30531)

2025-12-18 14:36:49 +08:00

cpu_attn_amx.hpp

[Bugfix][CI] fix typos (#34934)

2026-03-05 17:05:46 +00:00

cpu_attn_impl.hpp

[CPU][Perf] Accelerate Attention head for s390x using vector intrinsics (#34434)

2026-02-24 07:25:39 -08:00

cpu_attn_neon_bfmmla.hpp

[cpu][performance] CPU Paged Attention NEON BFMMLA BF16 Implementation (#32263)

2026-02-06 15:01:48 +08:00

cpu_attn_neon.hpp

[cpu][performance] CPU Paged Attention NEON BFMMLA BF16 Implementation (#32263)

2026-02-06 15:01:48 +08:00

cpu_attn_vec16.hpp

[CPU] Refactor CPU attention backend (#27954)

2025-11-12 09:43:06 +08:00

cpu_attn_vec.hpp

[CPU] Refactor CPU attention backend (#27954)

2025-11-12 09:43:06 +08:00

cpu_attn_vxe.hpp

[CPU][Perf] Accelerate Attention head for s390x using vector intrinsics (#34434)

2026-02-24 07:25:39 -08:00

cpu_attn.cpp

[CPU][Perf] Accelerate Attention head for s390x using vector intrinsics (#34434)

2026-02-24 07:25:39 -08:00

cpu_fused_moe.cpp

[Bugfix][CPU] Fix llama4 inference on CPU (#34321)

2026-02-11 19:07:23 +08:00

cpu_types_arm.hpp

[Feature][CPU Backend]: Optimize ARM vectorization backend (#30329)

2026-02-02 20:17:56 -08:00

cpu_types_riscv.hpp

feat: add RISC-V support for CPU backend (v2) (#36578)

2026-03-10 21:51:39 -07:00

cpu_types_scalar.hpp

refactor(cpu_types_scalar.hpp): Unify scalar loop implementations using unroll_loop (#28847)

2025-11-19 11:05:44 +00:00

cpu_types_vsx.hpp

[Hardware][Power] Enable compressed tensor W8A8 INT8 quantization for POWER (#17153)

2025-05-07 22:35:03 -07:00

cpu_types_vxe.hpp

[CPU] Enable FP16 (Half dtype) support for s390x (#34116)

2026-02-11 14:41:42 +08:00

cpu_types_x86.hpp

[CPU] Refactor CPU fused MOE (#30531)

2025-12-18 14:36:49 +08:00

cpu_types.hpp

feat: add RISC-V support for CPU backend (v2) (#36578)

2026-03-10 21:51:39 -07:00

cpu_wna16.cpp

[Doc]: fixing multiple typos in diverse files (#33256)

2026-01-29 16:52:03 +08:00

dnnl_helper.cpp

[Perf] Use dummy M for weight prepacking on x86 (#35890)

2026-03-05 04:56:49 +00:00

dnnl_helper.h

[CPU] Refactor CPU attention backend (#27954)

2025-11-12 09:43:06 +08:00

dnnl_kernels.cpp

[Feature][CPU Backend]: Optimize ARM vectorization backend (#30329)

2026-02-02 20:17:56 -08:00

float_convert.hpp

[Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112)

2025-09-25 20:46:11 +08:00

generate_cpu_attn_dispatch.py

[CPU] Support head_size 512 in cpu_attn (#38676)

2026-04-01 05:42:27 +00:00

layernorm.cpp

[Kernel][Misc] Use TORCH_LIBRARY instead of PYBIND11_MODULE for custom ops (#5047)

2024-06-09 16:23:30 -04:00

mla_decode.cpp

[CPU] Enable FP16 (Half dtype) support for s390x (#34116)

2026-02-11 14:41:42 +08:00

pos_encoding.cpp

Make key optional for rotary embedding (#17566)

2025-05-07 00:11:46 -07:00

shm.cpp

[Bugfix][CPU] Fix thread num for shared memory communication (#33317)

2026-01-29 03:26:58 -08:00

torch_bindings.cpp

[CPU] Support int8 compute mode in CPU AWQ (#35697)

2026-03-31 15:27:37 +08:00

utils.cpp

[Bugfix] Add replacement of _compute_slot_mapping_kernel on CPU (#37987)

2026-03-24 07:00:20 -07:00

utils.hpp

[Feature][CPU Backend]: Optimize ARM vectorization backend (#30329)

2026-02-02 20:17:56 -08:00