Chendi.Xue c3e2978620 [NIXL] fix cpu PD after physical <> logical block_size PR (#28904) ...

Signed-off-by: Chendi Xue <chendi.xue@intel.com>

2025-11-18 14:03:23 -05:00

..

ep_kernels

[Misc] Make all tool scripts executable (#27831)

2025-10-30 23:46:02 +00:00

pre_commit

[CI] Fix mypy for vllm/v1/core and vllm/v1/engine (#27108)

2025-10-30 11:32:17 +00:00

profiler

[Frontend] Add vllm bench sweep to CLI (#27639)

2025-10-29 05:59:48 -07:00

vllm-tpu

[TPU] patch TPU wheel build script to resolve metadata issue (#27279)

2025-11-13 09:36:54 -08:00

check_repo.sh

[Misc] Make all tool scripts executable (#27831)

2025-10-30 23:46:02 +00:00

flashinfer-build.sh

[Misc] Make all tool scripts executable (#27831)

2025-10-30 23:46:02 +00:00

generate_cmake_presets.py

Convert formatting to use ruff instead of yapf + isort (#26247)

2025-10-05 07:06:22 -07:00

install_deepgemm.sh

update to latest deepgemm for dsv3.2 (#25871)

2025-09-29 17:51:43 +08:00

install_gdrcopy.sh

Update PyTorch to 2.9.0+cu129 (#24994)

2025-10-21 17:20:18 -04:00

install_nixl_from_source_ubuntu.py

[NIXL] fix cpu PD after physical <> logical block_size PR (#28904)

2025-11-18 14:03:23 -05:00

report_build_time_ninja.py

Convert formatting to use ruff instead of yapf + isort (#26247)

2025-10-05 07:06:22 -07:00