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181 Commits

Author SHA1 Message Date
Jeffrey Wang
53700bf49b [ci] Add Ray compatibility check informational CI job (#34672) 
Signed-off-by: Jeffrey Wang <jeffreywang@anyscale.com>
 2026-03-02 12:06:16 -08:00
Patryk Wolsza
358e4d5ba7 [CI][HPU] Pin vllm commit compatible with vllm-gaudi - HPU tests (#35307) 
Signed-off-by: PatrykWo <patryk.wolsza@intel.com>
 2026-03-02 17:02:26 +00:00
Andreas Karatzas
88e8525f2e [ROCm][CI] Adding infiniband mappings for moriio tests (#35170) 
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
 2026-02-28 13:53:28 +08:00
Ming Yang
6831650c40 [offloader] v2: Hide weight onloading latency via prefetching (#29941) 
Signed-off-by: Ming Yang <minos.future@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
 2026-02-25 17:20:59 -08:00
Andreas Karatzas
067c5d9ad1 [ROCm][CI] Added MI325 mirrors (#34923) 
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
 2026-02-24 13:37:15 -08:00
Michael Goin
fac1507f03 [CI] Remove failing prime-rl integration test (#34843) 
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
 2026-02-20 10:17:42 -08:00
Ilya Markov
6b3166a7c7 [CI][Bugfix] Fix multinode test script (#34820) 
Signed-off-by: ilmarkov <markovilya197@gmail.com>
 2026-02-18 11:45:10 -05:00
junuxyz
c61a98f529 [CI][BugFix] ShellCheck cleanup to remove baseline and preserve runtime behavior (#34514) 
Signed-off-by: junuxyz <216036880+junuxyz@users.noreply.github.com>
 2026-02-17 12:22:56 +00:00
Harry Mellor
a21cedf4ff Bump lm-eval version for Transformers v5 compatibility (#33994) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2026-02-16 05:24:35 -08:00
zofia
9bdb06b436 [XPU][6/N] add xpu scaled_mm kernel (#34117) 
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
 2026-02-09 20:17:35 +08:00
zofia
2ce9fe4ad0 [XPU][5/N] add wna16 xpu kernel (#33973) 
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
 2026-02-06 15:59:53 +00:00
Li, Jiang
07daee132b [CI/Build] Parallelize CPU CI tests (#33778) 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
 2026-02-05 13:53:48 +08:00
Kevin H. Luu
72bb24e2db [release] Minor fixes to release annotation (#33849) 
Signed-off-by: Kevin H. Luu <khluu000@gmail.com>
 2026-02-05 02:07:35 +00:00
Kunshang Ji
f79f777803 [XPU][2/N] add support unquantized moe support for xpu (#33659) 
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
 2026-02-04 02:12:25 -08:00
Matt
08e094997e [Hardware][AMD][CI] Refactor AMD tests to properly use BuildKite parallelism (#32745) 
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
 2026-02-04 14:51:33 +08:00
杨朱 · Kiki
b95cc5014d [Misc] Remove deprecated VLLM_ALL2ALL_BACKEND environment variable (#33535) 
Signed-off-by: carlory <baofa.fan@daocloud.io>
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
 2026-02-03 15:01:59 +08:00
Kunshang Ji
e10604480b [XPU][1/N] Deprecate ipex and switch to vllm-xpu-kernels for xpu platform (#33379) 
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
 2026-02-02 22:46:10 -08:00
Nathan Weinberg
1b60b45d0d [CI/Build] add directions for CPU image upload to Docker Hub (#32032) 
Signed-off-by: Nathan Weinberg <nweinber@redhat.com>
Signed-off-by: Nathan Weinberg <31703736+nathan-weinberg@users.noreply.github.com>
Co-authored-by: Li, Jiang <bigpyj64@gmail.com>
 2026-02-03 02:48:06 +00:00
Chendi.Xue
2b465570e6 [CI][HPU]accelerate hpu test by skip python re-install and clean container name (#33286) 
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
 2026-01-30 21:36:29 +00:00
Kevin H. Luu
2284461d02 [release] Minor fixes to release annotation and wheel upload (#33129) 
Signed-off-by: khluu <khluu000@gmail.com>
 2026-01-29 12:09:35 -08:00
Didier Durand
31b25f6516 [Doc]: fixing multiple typos in diverse files (#33256) 
Signed-off-by: Didier Durand <durand.didier@gmail.com>
Signed-off-by: Didier Durand <2927957+didier-durand@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
 2026-01-29 16:52:03 +08:00
TJian
f9d03599ef [Release] [CI] Optim release pipeline (#33156) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2026-01-28 22:45:42 -08:00
Yan Ma
9581185d51 [XPU]disable test_acceptance_length UT (#33226) 2026-01-28 15:24:13 +08:00
Alexei-V-Ivanov-AMD
3c3c547ce0 Enabling "2 node" distributed tests in the AMD CI pipeline. (#32719) 
Signed-off-by: DCCS-4560 <alivanov@chi-mi325x-pod1-112.ord.vultr.cpe.ice.amd.com>
Co-authored-by: DCCS-4560 <alivanov@chi-mi325x-pod1-112.ord.vultr.cpe.ice.amd.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
 2026-01-27 19:13:21 +00:00
Shengqi Chen
136c499f6e [CI] fix version comparsion and exclusion patterns in upload-release-wheels.sh (#32971) 
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
 2026-01-23 22:21:49 +00:00
Shengqi Chen
965765aef9 [build] fix cu130 related release pipeline steps and publish as nightly image (#32522) 
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
 2026-01-17 18:36:11 -08:00
Shengqi Chen
8e61425ee6 [CI] Implement uploading to PyPI and GitHub in the release pipeline, enable release image building for CUDA 13.0 (#31032) 2026-01-17 04:52:33 +00:00
TJian
41c544f78a [ROCm] [CI] [Release] Rocm wheel pipeline with sccache (#32264) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2026-01-16 02:56:18 +08:00
Douglas Lehr
c5891b5430 [ROCM] Add ROCm image build to release pipeline (#31995) 
Signed-off-by: Doug Lehr <douglehr@amd.com>
Co-authored-by: Doug Lehr <douglehr@amd.com>
 2026-01-15 19:01:40 +08:00
Micah Williamson
6fa6e7ef0c [ROCm][CI] Disable Async Scheduling For Qwen3-Next-80B-A3B-Instruct MTP Async EPLB Accuracy Test (#32275) 
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
 2026-01-14 13:29:42 +08:00
Simon Mo
0db574b185 [Build] Add scripts for cherry-picking and trigger build (#32282) 
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
 2026-01-13 13:21:05 -08:00
Divakar Verma
a28d9f4470 [ROCm][CI] Handle pytest status code 5 when a shard isn't allocated any tests (#32040) 
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
 2026-01-12 17:35:49 -05:00
TJian
72c068b8e0 [CI] [Bugfix] Fix unbounded variable in run-multi-node-test.sh (#31967) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2026-01-08 05:42:01 -08:00
Charlie Fu
cddbc2b4b2 [ROCm][CI] Add rocm support for run-multi-node-test.sh (#31922) 
Signed-off-by: charlifu <charlifu@amd.com>
Signed-off-by: Charlie Fu <Charlie.Fu@amd.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
 2026-01-08 04:36:39 +00:00
Li, Jiang
17347daaa2 [CI/Build][CPU] Update CPU CI test cases (#31466) 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
 2025-12-29 14:17:52 +08:00
Cyrus Leung
d201807339 [Chore] Bump lm-eval version (#31264) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-12-24 05:39:13 -08:00
Shengqi Chen
2cf91c2ea4 [CI] add polling for precompiled wheel in python_only_compile.sh, fix index generation for releases (#30781) 
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
 2025-12-22 13:24:21 +00:00
Kevin McKay
8c084de59d [Misc] Fix spelling typos in comments (#31114) 
Signed-off-by: c0de128 <kevin.mckay@outlook.com>
 2025-12-21 21:13:14 -08:00
Elizabeth Thomas
41b6f9200f Remove all2all backend envvar (#30363) 
Signed-off-by: Elizabeth Thomas <email2eliza@gmail.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-12-18 19:46:28 +00:00
Li, Jiang
e3ab93c896 [CPU] Refactor CPU fused MOE (#30531) 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
 2025-12-18 14:36:49 +08:00
Matthew Bonanni
7eb6cb6c18 [Attention] Update tests to remove deprecated env vars (#30563) 
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
 2025-12-17 09:49:59 -08:00
Chauncey
9ad5b21710 [Refactor] [4/N] Move VLLM_SERVER_DEV endpoints into the serve directory (#30749) 
Signed-off-by: chaunceyjiang <chaunceyjiang@gmail.com>
 2025-12-17 02:27:30 -08:00
Micah Williamson
97f2f160fd [ROCm][CI] Add "Qwen3-Next-80B-A3B-Instruct MTP Async EPLB Accuracy Test" Back Into AMD CI (#30590) 
Signed-off-by: David Chen <530634352@qq.com>
Signed-off-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
 2025-12-14 06:56:26 +00:00
Shengqi Chen
305b168a9f [CI] refine more logic when generating and using nightly wheels & indices, add cuda130 build for aarch64, specify correct manylinux version (#30341) 
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
 2025-12-12 00:42:30 +08:00
Sage Moore
b4054c8ab4 Revert "[CI] Add Async Eplb nightly CI tests (#29385)" (#30431) 2025-12-11 00:48:35 +00:00
Aditya Tewari
cebda2a4af [CPU] Support for Whisper (#30062) 
Signed-off-by: Aditya Tewari <aditya.tewari@arm.com>
 2025-12-10 04:58:42 -08:00
Fadi Arafeh
e130845984 [CPU][CI] Enable fused MoE tests in Arm CI (#30132) 
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
 2025-12-09 04:55:39 +00:00
Or Ozeri
4c6fd25880 kv_transfer: Rename the shared storage connectors (#30201) 
Signed-off-by: Or Ozeri <oro@il.ibm.com>
 2025-12-08 20:46:09 -08:00
Micah Williamson
78c7503364 [ROCm][CI] Skip NVIDIA-Only Prime-RL Test in AMD CI (#29420) 
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
 2025-12-09 02:14:02 +00:00
Yi Liu
0d8a7d8a26 [Compressed Tensors] Add XPU wNa16 support (#29484) 
Signed-off-by: yiliu30 <yi4.liu@intel.com>
 2025-12-05 22:02:09 +08:00