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72 Commits

Author SHA1 Message Date
Chaojun Zhang
9f9a675b23 [XPU][8/N] Fix kernel bugs in XPU LoRA and MOE LORA (#34115) 
Signed-off-by: chzhang <chaojun.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
 2026-02-26 15:46:44 +08:00
Xin Yang
c870eb9e0f [LoRA] Update LoRA expand kernel block_n calculation (#32621) 
Signed-off-by: Xin Yang <xyangx@amazon.com>
 2026-02-23 23:17:53 -08:00
yugong333
a55caf6ae9 [LoRA] Support Quantized Adapters (#30286) 
Signed-off-by: Yu Gong <yu3.gong@gmail.com>
Signed-off-by: wz1qqx <ziqi.wang@novita.ai>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: wz1qqx <55830058+wz1qqx@users.noreply.github.com>
Co-authored-by: wz1qqx <ziqi.wang@novita.ai>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
 2026-02-20 19:54:35 -08:00
Xin Yang
3920cafdd6 [Bugfix] Fix _fused_moe_lora_expand signature mismatch (#33821) 
Signed-off-by: Xin Yang <xyangx@amazon.com>
 2026-02-07 10:45:59 +08:00
yugong333
ffe1fc7a28 Reduce the kernel overhead when num of active loras is smaller than max loras. Multiple cuda graphs are captured for each num of active-loras. (#32005) 
Signed-off-by: Yu Gong <yu3.gong@gmail.com>
 2026-02-02 12:30:06 -05:00
Runkai Tao
7320ca3942 Add unpermute-aware fused MoE LoRA path (#32655) 
Signed-off-by: Runkai Tao <rt572@physics.rutgers.edu>
 2026-02-02 09:46:09 +08:00
cwazai
f210f0b7b1 [lora/moe] Avoid extra intermediate buffer & Python slicing in expand phase when split_k == 1 (#32774) 
Signed-off-by: 陈建华 <1647430658@qq.com>
 2026-01-29 00:22:45 +08:00
cwazai
e33192b269 [lora/moe] Improve fused MoE‑LoRA kernel indexing and memory access (#32770) 
Signed-off-by: 陈建华 <1647430658@qq.com>
Signed-off-by: Yanwen Lin <lyw1124278064@gmail.com>
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Signed-off-by: Ifta Khairul Alam Adil <ikaadil007@gmail.com>
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Signed-off-by: Tsai, Louie <louie.tsai@intel.com>
Signed-off-by: Louie Tsai <louie.tsai@intel.com>
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Signed-off-by: Joshua Deng <joshuakdeng@gmail.com>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: cwazai <38356712+cwazai@users.noreply.github.com>
Co-authored-by: Yanwen Lin <lyw1124278064@gmail.com>
Co-authored-by: Kim Hee Su <wlskaka4@gmail.com>
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Co-authored-by: Kebe <mail@kebe7jun.com>
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Co-authored-by: Maryam Tahhan <mtahhan@redhat.com>
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Co-authored-by: JJJYmmm <92386084+JJJYmmm@users.noreply.github.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2026-01-26 04:56:34 -08:00
Danielle Robinson
ee484b3f4b Set splitk=1 for fused-moe-lora expand kernel (#32882) 
Signed-off-by: Danielle Robinson <dmmaddix@amazon.com>
Co-authored-by: Danielle Robinson <dmmaddix@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2026-01-25 22:52:34 -08:00
Jee Jee Li
73b243463b [BugFix] Add env variable to control PDL in LoRA (#32836) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2026-01-25 16:32:30 +08:00
yugong333
d4dbb7af63 Using max_loras + 1 to construct grid in fused_moe_lora (#32277) 
Signed-off-by: Yu Gong <yu3.gong@gmail.com>
 2026-01-24 12:39:30 -05:00
Xin Yang
ecc3dd66cc [Bugfix] Fix FusedMoE LoRA kernel offs_token out of bound value (#32279) 
Signed-off-by: Xin Yang <xyangx@amazon.com>
 2026-01-24 01:41:35 +00:00
Xin Yang
a884bc62d6 [LoRA] Update LoRA expand kernel heuristic (#32425) 
Signed-off-by: Xin Yang <xyangx@amazon.com>
 2026-01-16 18:38:07 +00:00
cjackal
15b33ff064 [Misc] improve warning/assert messages (#32226) 
Signed-off-by: cjackal <44624812+cjackal@users.noreply.github.com>
 2026-01-13 03:11:23 +00:00
Xin Yang
543c23be78 [LoRA][Perf] Improve FusedMoE LoRA performance for small rank (#32019) 
Signed-off-by: Xin Yang <xyangx@amazon.com>
 2026-01-10 11:04:18 -08:00
weiyu
e7596371a4 [Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808) 
Signed-off-by: Wei-Yu Lin <weiyulin@google.com>
Signed-off-by: weiyu <62784299+weiyu0824@users.noreply.github.com>
 2026-01-07 16:07:16 +08:00
Jee Jee Li
cbd4690a03 [LoRA]Disable linear LoRA kernel PDL (#31777) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2026-01-06 23:12:25 +08:00
Jee Jee Li
d5503ca7f9 [LoRA] LoRA PDL improvement (#31660) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2026-01-05 08:28:46 +00:00
quanliu
a37328fc5c [Feature] Batch invariant: Lora (#30097) 
Signed-off-by: quanliu <18646313696@163.com>
 2025-12-23 10:32:47 +08:00
gnovack
5a3adf581e fused_moe_lora PDL improvements (#30716) 
Signed-off-by: gnovack <gnovack@amazon.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-12-17 19:55:00 -08:00
Jee Jee Li
dd38ba3a26 [Bugfix] Fix adapter_enabled IMA (#29977) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-12-04 12:51:15 +08:00
gnovack
d69062c67a add support for --fully-sharded-loras in fused_moe (#28761) 
Signed-off-by: gnovack <gnovack@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-19 16:32:00 +08:00
Didier Durand
083cf326dc [Doc]: fix typos in various files (#28863) 
Signed-off-by: Didier Durand <durand.didier@gmail.com>
 2025-11-17 20:32:14 -08:00
Fanli Lin
dbbe0c756a [XPU] Support Triton path for LoRA operations on XPU (#28511) 
Signed-off-by: Fanli Lin <fanli.lin@intel.com>
 2025-11-13 05:31:42 +00:00
Chaojun Zhang
7dbe6d81d6 Fix Fused MoE LoRA Triton kernel bug (#28450) 
Signed-off-by: chaojun-zhang <chaojun.zhang@intel.com>
 2025-11-11 20:46:47 +08:00
caozuoba
40e2eeeb92 [Kernel] Optimization of the mm_k operator. (#28280) 
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-10 16:03:46 +00:00
Jee Jee Li
21b82f4ea2 [Kernel] LoRA triton kernels support PDL (#27402) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-07 08:05:48 +00:00
Michael Yao
518ec6b722 [Docs] Clean up README_TUNING.md (#28088) 
Signed-off-by: windsonsea <haifeng.yao@daocloud.io>
 2025-11-05 19:01:34 +00:00
yugong333
2ec401bc39 Load tuned fused_moe_lora shrink and expand kernel configs separately (#27435) 
Signed-off-by: Yu Gong <yu3.gong@gmail.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-04 18:27:35 +08:00
li2haipeng
6ddae74054 [LoRA] Lora shrink swizzle (#27694) 
Signed-off-by: li2haipeng <44383182+li2haipeng@users.noreply.github.com>
Signed-off-by: Haipeng Li <li2haipeng@gmail.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-04 09:30:20 +08:00
gnovack
294c805f1d Early exit for MoE LoRA kernels (#27131) 
Signed-off-by: gnovack <gnovack@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-03 20:22:17 +08:00
yugong333
29de3cdee4 Adding SplitK in fused_moe_lora kernel (#27818) 
Signed-off-by: Yu Gong <yu3.gong@gmail.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-11-01 12:55:46 +08:00
Jee Jee Li
f4e8154076 [Kernel] Enable moe LoRA kernel support FP16 (#27468) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-10-27 19:48:37 +08:00
Danielle Robinson
9932ed6a83 [Kernel] Adding split_K implementation for fused_moe_lora (#27291) 
Signed-off-by: Danielle Robinson <dmmaddix@amazon.com>
Signed-off-by: Danielle Robinson <dcmaddix@gmail.com>
Co-authored-by: Danielle Robinson <dmmaddix@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-10-27 02:05:24 -07:00
gnovack
a806c14cc7 [Performance][LoRA] add context varying params to 'do_not_specialize' in fused moe lora (#27445) 
Signed-off-by: gnovack <gnovack@amazon.com>
 2025-10-27 06:31:55 +00:00
Chen Wu
5f6cbf60d6 [Feature][Kernel]FusedMoE LoRA (#21229) 
Signed-off-by: wuchen <cntryroa@gmail.com>
Signed-off-by: banjuede <lmklhc@163.com>
Signed-off-by: Chen Wu <cntryroa@gmail.com>
Signed-off-by: Danielle Robinson <dmmaddix@amazon.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: bk-201 <joy25810@foxmail.com>
Co-authored-by: wuchen <wuchen@zetyun.com>
Co-authored-by: Nathan Van Gheem <vangheem@gmail.com>
Co-authored-by: banjuede <lmklhc@163.com>
Co-authored-by: Danielle Robinson <dmmaddix@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: bk-201 <joy25810@foxmail.com>
 2025-10-21 03:01:37 +00:00
Andy Lo
b63f2143f8 [LoRA] LoRA cuda graph specialization (#25914) 
Signed-off-by: Andy Lo <andy@mistral.ai>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-10-20 04:21:09 +00:00
Isotr0py
6ac5e06f7c [Chore] Clean up pytorch helper functions in vllm.utils (#26908) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: isotr0py <2037008807@qq.com>
 2025-10-18 09:48:22 -07:00
li2haipeng
d4d1a6024f [Lora]Load tuned multi-lora kernel configs from json files (#26319) 
Signed-off-by: li2haipeng <44383182+li2haipeng@users.noreply.github.com>
Signed-off-by: Haipeng Li <li2haipeng@gmail.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-10-15 09:45:14 +00:00
Harry Mellor
8fcaaf6a16 Update Optional[x] -> x | None and Union[x, y] to x | y (#26633) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-12 09:51:31 -07:00
Harry Mellor
d6953beb91 Convert formatting to use ruff instead of yapf + isort (#26247) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-05 07:06:22 -07:00
Michael Goin
7361ab379f Remove redundant mutates_args and dispatch_key for direct_register_custom_op (#25512) 
Signed-off-by: mgoin <mgoin64@gmail.com>
 2025-09-23 22:48:40 +00:00
Michael Yao
fafbe11af4 [Docs] Fix griffe warnings in vllm/lora/ops (#25369) 
Signed-off-by: windsonsea <haifeng.yao@daocloud.io>
 2025-09-23 03:42:58 +00:00
Chaojun Zhang
ec261b0291 [XPU] IPEX-optimized Punica Wrapper on XPU (#21703) 
Signed-off-by: chzhang <chaojun.zhang@intel.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-07-28 16:43:37 +00:00
Wentao Ye
c1acd6d7d4 [Refactor] Change the way of import triton (#20774) 
Signed-off-by: yewentao256 <zhyanwentao@126.com>
 2025-07-12 19:39:55 -07:00
Yan Ma
a4c23314c0 [xpu]feat: support multi-lora on xpu (#20616) 
Signed-off-by: yan <yan.ma@intel.com>
 2025-07-08 22:07:10 +08:00
Simon Mo
02f0c7b220 [Misc] Add SPDX-FileCopyrightText (#19100) 
Signed-off-by: simon-mo <simon.mo@hey.com>
 2025-06-03 11:20:17 -07:00
Fred Reiss
f2c3f66d59 [Bugfix] Fix for issue 17396 (#18773) 
Signed-off-by: Fred Reiss <frreiss@us.ibm.com>
 2025-05-31 11:58:17 +00:00
Akshat Tripathi
643622ba46 [Hardware][TPU][V1] Multi-LoRA Optimisations for the V1 TPU backend (#15655) 
Signed-off-by: Akshat Tripathi <akshat@krai.ai>
Signed-off-by: Chengji Yao <chengjiyao@google.com>
Signed-off-by: xihajun <junfan@krai.ai>
Signed-off-by: Jorge de Freitas <jorge.de-freitas22@imperial.ac.uk>
Signed-off-by: Jorge de Freitas <jorge@krai.ai>
Co-authored-by: Chengji Yao <chengjiyao@google.com>
Co-authored-by: xihajun <junfan@krai.ai>
Co-authored-by: Jorge de Freitas <jorge.de-freitas22@imperial.ac.uk>
Co-authored-by: Jorge de Freitas <jorge@krai.ai>
 2025-05-28 19:59:09 +00:00
omahs
a9944aabfa fix: typos (#18151) 
Signed-off-by: omahs <73983677+omahs@users.noreply.github.com>
 2025-05-15 02:16:15 -07:00