[LoRA] Support dynamically initialize packed_modules_mapping for VLM with arbitrary components (#18987)
Signed-off-by: isotr0py <2037008807@qq.com> Signed-off-by: Isotr0py <2037008807@qq.com>
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@@ -415,6 +415,10 @@ class InternVisionEncoder(nn.Module):
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class InternVisionModel(nn.Module):
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packed_modules_mapping = {
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"qkv": ["qkv"],
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}
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def __init__(
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self,
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config: PretrainedConfig,
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@@ -1019,15 +1019,6 @@ class InternVLMultiModalProcessor(
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class InternVLChatModel(nn.Module, SupportsMultiModal, SupportsPP,
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SupportsLoRA):
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packed_modules_mapping = {
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"wqkv": ["wqkv"],
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"qkv": ["qkv"],
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"gate_up_proj": [
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"w1",
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"w3",
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],
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}
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def __init__(self, *, vllm_config: VllmConfig, prefix: str = "") -> None:
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super().__init__()
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@@ -821,17 +821,6 @@ class Qwen2_5_VLMultiModalProcessor(Qwen2VLMultiModalProcessor):
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dummy_inputs=Qwen2_5_VLDummyInputsBuilder)
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class Qwen2_5_VLForConditionalGeneration(nn.Module, SupportsMultiModal,
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SupportsLoRA, SupportsPP):
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packed_modules_mapping = {
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"qkv_proj": [
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"q_proj",
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"k_proj",
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"v_proj",
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],
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"gate_up_proj": [
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"gate_proj",
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"up_proj",
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],
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}
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# To ensure correct weight loading and mapping.
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hf_to_vllm_mapper = WeightsMapper(orig_to_new_prefix={
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@@ -1069,17 +1069,6 @@ class Qwen2VLMultiModalProcessor(BaseMultiModalProcessor[Qwen2VLProcessingInfo]
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dummy_inputs=Qwen2VLDummyInputsBuilder)
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class Qwen2VLForConditionalGeneration(nn.Module, SupportsMultiModal,
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SupportsLoRA, SupportsPP):
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packed_modules_mapping = {
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"qkv_proj": [
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"q_proj",
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"k_proj",
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"v_proj",
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],
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"gate_up_proj": [
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"gate_proj",
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"up_proj",
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],
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}
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# To ensure correct weight loading and mapping.
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hf_to_vllm_mapper = WeightsMapper(orig_to_new_prefix={
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