[vLLM IR] rework gemma_rms_norm (#39014)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com> Signed-off-by: Jiangyun Zhu <riverclouds.zhu@qq.com> Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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@@ -36,13 +36,11 @@ AITER_SUPPORTED = is_aiter_found()
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rms_no_var_16bit_only = (
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lambda x, weight, epsilon, variance_size=None: variance_size is None
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and x.dtype
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in (
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torch.float16,
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torch.bfloat16,
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)
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and x.dtype in (torch.float16, torch.bfloat16)
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and (weight is None or weight.dtype == x.dtype)
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)
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"""AITER rms_norm only supports float16 and bfloat16 acts and no var_size override."""
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"""AITER rms_norm only supports float16 and bfloat16 acts, no var_size override,
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and requires weight dtype to match x dtype."""
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@ir.ops.rms_norm.register_impl(
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@@ -11,8 +11,11 @@ current_platform.import_kernels()
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CUDA_ALIKE = current_platform.is_cuda_alike()
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"""Most kernels in this file are supported on all CUDA-alike platforms."""
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rms_no_var_size = lambda x, weight, epsilon, variance_size=None: variance_size is None
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"""vLLM kernel does not support variance_size parameter."""
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rms_no_var_size = (
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lambda x, weight, epsilon, variance_size=None: variance_size is None
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and (weight is None or weight.dtype == x.dtype)
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)
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"""vLLM kernel requires no variance_size override and matching input/weight dtype."""
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@ir.ops.rms_norm.register_impl(
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@@ -18,7 +18,9 @@ def is_xpu_kernels_found() -> bool:
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XPU_KERNELS_SUPPORTED = is_xpu_kernels_found()
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"""Kernels in this file are supported if vLLM XPU kernels are installed."""
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rms_no_var = lambda x, weight, epsilon, variance_size=None: variance_size is None
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rms_no_var = lambda x, weight, epsilon, variance_size=None: variance_size is None and (
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weight is None or weight.dtype == x.dtype
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)
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@ir.ops.rms_norm.register_impl(
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