Merge EmbeddedLLM/vllm-rocm into vLLM main (#1836)
Co-authored-by: Philipp Moritz <pcmoritz@gmail.com> Co-authored-by: Amir Balwel <amoooori04@gmail.com> Co-authored-by: root <kuanfu.liu@akirakan.com> Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com> Co-authored-by: kuanfu <kuanfu.liu@embeddedllm.com> Co-authored-by: miloice <17350011+kliuae@users.noreply.github.com>
This commit is contained in:
@@ -1,6 +1,7 @@
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#include <torch/extension.h>
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#include <ATen/cuda/CUDAContext.h>
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#include "cuda_compat.h"
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#include "dispatch_utils.h"
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namespace vllm {
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@@ -18,8 +19,8 @@ __global__ void silu_and_mul_kernel(
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const int d) {
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const int64_t token_idx = blockIdx.x;
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for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
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const scalar_t x = __ldg(&input[token_idx * 2 * d + idx]);
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const scalar_t y = __ldg(&input[token_idx * 2 * d + d + idx]);
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const scalar_t x = VLLM_LDG(&input[token_idx * 2 * d + idx]);
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const scalar_t y = VLLM_LDG(&input[token_idx * 2 * d + d + idx]);
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out[token_idx * d + idx] = silu(x) * y;
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}
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}
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@@ -57,7 +58,7 @@ __global__ void activation_kernel(
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const int d) {
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const int64_t token_idx = blockIdx.x;
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for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
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const scalar_t x = __ldg(&input[token_idx * d + idx]);
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const scalar_t x = VLLM_LDG(&input[token_idx * d + idx]);
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out[token_idx * d + idx] = ACT_FN(x);
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}
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}
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@@ -15,6 +15,10 @@
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifdef USE_ROCM
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#include <hip/hip_runtime.h>
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#endif
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#include <torch/extension.h>
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#include <ATen/cuda/CUDAContext.h>
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@@ -23,7 +27,11 @@
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#include <algorithm>
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#ifndef USE_ROCM
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#define WARP_SIZE 32
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#else
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#define WARP_SIZE warpSize
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#endif
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define DIVIDE_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
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@@ -40,7 +48,7 @@ inline __device__ float block_sum(float* red_smem, float sum) {
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// Compute the sum per warp.
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#pragma unroll
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for (int mask = WARP_SIZE / 2; mask >= 1; mask /= 2) {
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sum += __shfl_xor_sync(uint32_t(-1), sum, mask);
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sum += VLLM_SHFL_XOR_SYNC(sum, mask);
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}
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// Warp leaders store the data to shared memory.
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@@ -59,11 +67,11 @@ inline __device__ float block_sum(float* red_smem, float sum) {
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// Parallel reduction inside the warp.
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#pragma unroll
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for (int mask = NUM_WARPS / 2; mask >= 1; mask /= 2) {
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sum += __shfl_xor_sync(uint32_t(-1), sum, mask);
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sum += VLLM_SHFL_XOR_SYNC(sum, mask);
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}
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// Broadcast to other threads.
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return __shfl_sync(uint32_t(-1), sum, 0);
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return VLLM_SHFL_SYNC(sum, 0);
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}
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// TODO(woosuk): Merge the last two dimensions of the grid.
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@@ -223,7 +231,7 @@ __device__ void paged_attention_kernel(
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// The 0-th thread of each thread group already has its max qk value.
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#pragma unroll
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for (int mask = WARP_SIZE / 2; mask >= THREAD_GROUP_SIZE; mask /= 2) {
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qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask));
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qk_max = fmaxf(qk_max, VLLM_SHFL_XOR_SYNC(qk_max, mask));
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}
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if (lane == 0) {
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red_smem[warp_idx] = qk_max;
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@@ -235,10 +243,10 @@ __device__ void paged_attention_kernel(
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qk_max = lane < NUM_WARPS ? red_smem[lane] : -FLT_MAX;
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#pragma unroll
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for (int mask = NUM_WARPS / 2; mask >= 1; mask /= 2) {
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qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask));
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qk_max = fmaxf(qk_max, VLLM_SHFL_XOR_SYNC(qk_max, mask));
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}
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// Broadcast the max qk value to all threads.
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qk_max = __shfl_sync(uint32_t(-1), qk_max, 0);
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qk_max = VLLM_SHFL_SYNC(qk_max, 0);
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// Get the sum of the exp values.
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float exp_sum = 0.f;
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@@ -326,7 +334,7 @@ __device__ void paged_attention_kernel(
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float acc = accs[i];
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#pragma unroll
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for (int mask = NUM_V_VECS_PER_ROW / 2; mask >= 1; mask /= 2) {
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acc += __shfl_xor_sync(uint32_t(-1), acc, mask);
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acc += VLLM_SHFL_XOR_SYNC(acc, mask);
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}
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accs[i] = acc;
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}
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@@ -492,7 +500,7 @@ __global__ void paged_attention_v2_reduce_kernel(
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// Reduce within the warp.
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#pragma unroll
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for (int mask = WARP_SIZE / 2; mask >= 1; mask /= 2) {
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max_logit = fmaxf(max_logit, __shfl_xor_sync(uint32_t(-1), max_logit, mask));
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max_logit = fmaxf(max_logit, VLLM_SHFL_XOR_SYNC(max_logit, mask));
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}
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if (lane == 0) {
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red_smem[warp_idx] = max_logit;
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@@ -502,10 +510,10 @@ __global__ void paged_attention_v2_reduce_kernel(
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max_logit = lane < NUM_WARPS ? red_smem[lane] : -FLT_MAX;
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#pragma unroll
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for (int mask = NUM_WARPS / 2; mask >= 1; mask /= 2) {
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max_logit = fmaxf(max_logit, __shfl_xor_sync(uint32_t(-1), max_logit, mask));
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max_logit = fmaxf(max_logit, VLLM_SHFL_XOR_SYNC(max_logit, mask));
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}
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// Broadcast the max value to all threads.
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max_logit = __shfl_sync(uint32_t(-1), max_logit, 0);
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max_logit = VLLM_SHFL_SYNC(max_logit, 0);
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// Load rescaled exp sums to shared memory.
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float* shared_exp_sums = reinterpret_cast<float*>(shared_mem + sizeof(float) * num_partitions);
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@@ -539,9 +547,9 @@ __global__ void paged_attention_v2_reduce_kernel(
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} // namespace vllm
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#define LAUNCH_PAGED_ATTENTION_V1(HEAD_SIZE) \
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cudaFuncSetAttribute( \
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vllm::paged_attention_v1_kernel<T, HEAD_SIZE, BLOCK_SIZE, NUM_THREADS>, \
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cudaFuncAttributeMaxDynamicSharedMemorySize, shared_mem_size); \
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VLLM_DevFuncAttribute_SET_MaxDynamicSharedMemorySize( \
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((void*)vllm::paged_attention_v1_kernel<T, HEAD_SIZE, BLOCK_SIZE, NUM_THREADS>), \
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shared_mem_size); \
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vllm::paged_attention_v1_kernel<T, HEAD_SIZE, BLOCK_SIZE, NUM_THREADS> \
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<<<grid, block, shared_mem_size, stream>>>( \
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out_ptr, \
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@@ -17,6 +17,7 @@
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*/
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#pragma once
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#include "../cuda_compat.h"
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#include "attention_dtypes.h"
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#include <float.h>
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@@ -39,7 +40,7 @@ inline __device__ float qk_dot_(const Vec (&q)[N], const Vec (&k)[N]) {
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float qk = sum(qk_vec);
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#pragma unroll
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for (int mask = THREAD_GROUP_SIZE / 2; mask >= 1; mask /= 2) {
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qk += __shfl_xor_sync(uint32_t(-1), qk, mask);
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qk += VLLM_SHFL_XOR_SYNC(qk, mask);
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}
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return qk;
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}
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@@ -21,8 +21,17 @@
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#include "attention_generic.cuh"
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#include "dtype_float32.cuh"
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#ifndef USE_ROCM
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#else
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#include <hip/hip_bf16.h>
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#include <hip/hip_fp16.h>
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typedef __hip_bfloat162 __nv_bfloat162;
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typedef __hip_bfloat16 __nv_bfloat16;
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#endif
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#include <stdint.h>
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namespace vllm {
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@@ -98,7 +107,11 @@ inline __device__ __nv_bfloat16 add(__nv_bfloat16 a, __nv_bfloat16 b) {
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#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800
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assert(false);
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#else
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return a + b;
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#ifndef USE_ROCM
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return a + b;
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#else
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return __hadd(a, b);
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#endif
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#endif
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}
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@@ -21,6 +21,10 @@
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#include "attention_generic.cuh"
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#include "dtype_float32.cuh"
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#ifdef USE_ROCM
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#include <hip/hip_fp16.h>
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#endif
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#include <stdint.h>
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namespace vllm {
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@@ -63,21 +67,47 @@ struct FloatVec<uint4> {
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// Utility functions for type conversions.
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inline __device__ uint32_t h0_h0(uint16_t a) {
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#ifndef USE_ROCM
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uint32_t b;
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asm volatile("mov.b32 %0, {%1, %1};" : "=r"(b) : "h"(a));
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return b;
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#else
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union {
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uint32_t u32;
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uint16_t u16[2];
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} tmp;
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tmp.u16[0] = a;
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tmp.u16[1] = a;
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return tmp.u32;
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#endif
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}
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inline __device__ float half_to_float(uint16_t h) {
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float f;
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#ifndef USE_ROCM
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asm volatile("cvt.f32.f16 %0, %1;\n" : "=f"(f) : "h"(h));
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#else
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asm volatile("v_cvt_f32_f16 %0, %1;" : "=v"(f) : "v"(h));
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#endif
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return f;
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}
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inline __device__ float2 half2_to_float2(uint32_t v) {
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#ifndef USE_ROCM
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uint16_t lo, hi;
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asm volatile("mov.b32 {%0, %1}, %2;\n" : "=h"(lo), "=h"(hi) : "r"(v));
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return make_float2(half_to_float(lo), half_to_float(hi));
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#else
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union {
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uint32_t u32;
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uint16_t u16[2];
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} tmp;
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tmp.u32 = v;
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float2 ret;
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ret.x = half_to_float(tmp.u16[0]);
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ret.y = half_to_float(tmp.u16[1]);
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return ret;
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#endif
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}
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inline __device__ uint16_t float_to_half(float f) {
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@@ -85,7 +115,11 @@ inline __device__ uint16_t float_to_half(float f) {
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uint32_t u32;
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uint16_t u16[2];
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} tmp;
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#ifndef USE_ROCM
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asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f));
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#else
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asm volatile("v_cvt_f16_f32 %0, %1;\n" : "=v"(tmp.u32) : "v"(f));
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#endif
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return tmp.u16[0];
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}
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@@ -94,12 +128,16 @@ inline __device__ uint32_t float2_to_half2(float2 f) {
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uint32_t u32;
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uint16_t u16[2];
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} tmp;
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#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800
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asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(f.y), "f"(f.x));
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#ifndef USE_ROCM
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#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800
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asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(f.y), "f"(f.x));
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#else
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asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f.x));
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asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[1]) : "f"(f.y));
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#endif
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#else
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asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f.x));
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asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[1]) : "f"(f.y));
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tmp.u16[0] = float_to_half(f.x);
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tmp.u16[1] = float_to_half(f.y);
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#endif
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return tmp.u32;
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}
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@@ -107,13 +145,21 @@ inline __device__ uint32_t float2_to_half2(float2 f) {
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// Vector addition.
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inline __device__ uint16_t add(uint16_t a, uint16_t b) {
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uint16_t c;
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#ifndef USE_ROCM
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asm volatile("add.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b));
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#else
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asm volatile("v_add_f16 %0, %1, %2;\n" : "=v"(c) : "v"(a), "v"(b));
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#endif
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return c;
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}
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inline __device__ uint32_t add(uint32_t a, uint32_t b) {
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uint32_t c;
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#ifndef USE_ROCM
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asm volatile("add.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b));
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#else
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asm volatile("v_pk_add_f16 %0, %1, %2;\n" : "=v"(c) : "v"(a), "v"(b));
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#endif
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return c;
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}
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@@ -158,14 +204,22 @@ inline __device__ Float8_ add(uint4 a, Float8_ fb) {
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template<>
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inline __device__ uint16_t mul(uint16_t a, uint16_t b) {
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uint16_t c;
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#ifndef USE_ROCM
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asm volatile("mul.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b));
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#else
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asm volatile("v_mul_f16 %0, %1, %2;\n" : "=v"(c) : "v"(a), "v"(b));
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#endif
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return c;
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}
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template<>
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inline __device__ uint32_t mul(uint32_t a, uint32_t b) {
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uint32_t c;
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#ifndef USE_ROCM
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asm volatile("mul.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b));
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#else
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asm volatile("v_pk_mul_f16 %0, %1, %2;\n" : "=v"(c) : "v"(a), "v"(b));
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#endif
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return c;
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}
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@@ -272,7 +326,11 @@ inline __device__ Float8_ mul(uint16_t a, uint4 b) {
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// Vector fused multiply-add.
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inline __device__ uint32_t fma(uint32_t a, uint32_t b, uint32_t c) {
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uint32_t d;
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#ifndef USE_ROCM
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asm volatile("fma.rn.f16x2 %0, %1, %2, %3;\n" : "=r"(d) : "r"(a), "r"(b), "r"(c));
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#else
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asm volatile("v_pk_fma_f16 %0, %1, %2, %3;\n" : "=v"(d) : "v"(a), "v"(b), "v"(c));
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#endif
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return d;
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}
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@@ -1,6 +1,7 @@
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#include <torch/extension.h>
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#include <ATen/cuda/CUDAContext.h>
|
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|
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#include "cuda_compat.h"
|
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#include "dispatch_utils.h"
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#include <algorithm>
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@@ -28,8 +29,8 @@ void swap_blocks(
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TORCH_CHECK(false, "Invalid device combination");
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}
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void *src_ptr = src.data_ptr();
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void *dst_ptr = dst.data_ptr();
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char *src_ptr = static_cast<char*>(src.data_ptr());
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char *dst_ptr = static_cast<char*>(dst.data_ptr());
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const int64_t block_size_in_bytes = src.element_size() * src[0].numel();
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const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
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@@ -267,8 +268,8 @@ __global__ void gather_cached_kv_kernel(
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+ head_offset * block_size
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+ block_offset;
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key[tgt_key_idx] = __ldg(&key_cache[src_key_idx]);
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value[tgt_value_idx] = __ldg(&value_cache[src_value_idx]);
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key[tgt_key_idx] = VLLM_LDG(&key_cache[src_key_idx]);
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value[tgt_value_idx] = VLLM_LDG(&value_cache[src_value_idx]);
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}
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}
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@@ -333,8 +334,8 @@ __global__ void gather_cached_kv_kernel_optimized(
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src_key_indices[j] = src_key_idx;
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src_value_indices[j] = src_value_idx;
|
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keys_to_store[j] = __ldg(&key_cache[src_key_idx]);
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values_to_store[j] = __ldg(&value_cache[src_value_idx]);
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keys_to_store[j] = VLLM_LDG(&key_cache[src_key_idx]);
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values_to_store[j] = VLLM_LDG(&value_cache[src_value_idx]);
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}
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||||
#pragma unroll
|
||||
|
||||
28
csrc/cuda_compat.h
Normal file
28
csrc/cuda_compat.h
Normal file
@@ -0,0 +1,28 @@
|
||||
#pragma once
|
||||
|
||||
#ifndef USE_ROCM
|
||||
#define VLLM_LDG(arg) __ldg(arg)
|
||||
#else
|
||||
#define VLLM_LDG(arg) *(arg)
|
||||
#endif
|
||||
|
||||
#ifndef USE_ROCM
|
||||
#define VLLM_SHFL_XOR_SYNC(var, lane_mask) __shfl_xor_sync(uint32_t(-1), var, lane_mask)
|
||||
#else
|
||||
#define VLLM_SHFL_XOR_SYNC(var, lane_mask) __shfl_xor(var, lane_mask)
|
||||
#endif
|
||||
|
||||
#ifndef USE_ROCM
|
||||
#define VLLM_SHFL_SYNC(var, src_lane) __shfl_sync(uint32_t(-1), var, src_lane)
|
||||
#else
|
||||
#define VLLM_SHFL_SYNC(var, src_lane) __shfl(var, src_lane)
|
||||
#endif
|
||||
|
||||
#ifndef USE_ROCM
|
||||
#define VLLM_DevFuncAttribute_SET_MaxDynamicSharedMemorySize(FUNC, VAL) \
|
||||
cudaFuncSetAttribute(FUNC, cudaFuncAttributeMaxDynamicSharedMemorySize, VAL)
|
||||
#else
|
||||
#define VLLM_DevFuncAttribute_SET_MaxDynamicSharedMemorySize(FUNC, VAL) \
|
||||
hipFuncSetAttribute(FUNC, hipFuncAttributeMaxDynamicSharedMemorySize, VAL)
|
||||
#endif
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#ifdef USE_ROCM
|
||||
#include <hip/hip_runtime.h>
|
||||
#endif
|
||||
int get_device_attribute(
|
||||
int attribute,
|
||||
int device_id)
|
||||
|
||||
@@ -61,12 +61,14 @@ void gelu_fast(
|
||||
torch::Tensor& out,
|
||||
torch::Tensor& input);
|
||||
|
||||
#ifndef USE_ROCM
|
||||
torch::Tensor awq_gemm(
|
||||
torch::Tensor _in_feats,
|
||||
torch::Tensor _kernel,
|
||||
torch::Tensor _scaling_factors,
|
||||
torch::Tensor _zeros,
|
||||
int split_k_iters);
|
||||
#endif
|
||||
|
||||
void squeezellm_gemm(
|
||||
torch::Tensor vec,
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
#include <torch/extension.h>
|
||||
#include <ATen/cuda/CUDAContext.h>
|
||||
|
||||
#include "cuda_compat.h"
|
||||
#include "dispatch_utils.h"
|
||||
|
||||
namespace vllm {
|
||||
@@ -19,14 +20,14 @@ inline __device__ void apply_rotary_embedding(
|
||||
// GPT-NeoX style rotary embedding.
|
||||
x_index = rot_offset;
|
||||
y_index = embed_dim + rot_offset;
|
||||
cos = __ldg(cos_ptr + x_index);
|
||||
sin = __ldg(sin_ptr + x_index);
|
||||
cos = VLLM_LDG(cos_ptr + x_index);
|
||||
sin = VLLM_LDG(sin_ptr + x_index);
|
||||
} else {
|
||||
// GPT-J style rotary embedding.
|
||||
x_index = 2 * rot_offset;
|
||||
y_index = 2 * rot_offset + 1;
|
||||
cos = __ldg(cos_ptr + x_index / 2);
|
||||
sin = __ldg(sin_ptr + x_index / 2);
|
||||
cos = VLLM_LDG(cos_ptr + x_index / 2);
|
||||
sin = VLLM_LDG(sin_ptr + x_index / 2);
|
||||
}
|
||||
|
||||
const scalar_t x = arr[x_index];
|
||||
|
||||
@@ -48,8 +48,12 @@ PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
|
||||
&rotary_embedding,
|
||||
"Apply GPT-NeoX or GPT-J style rotary embedding to query and key");
|
||||
|
||||
#ifndef USE_ROCM
|
||||
// Quantization ops
|
||||
ops.def("awq_gemm", &awq_gemm, "Quantized GEMM for AWQ");
|
||||
#endif
|
||||
|
||||
|
||||
ops.def("squeezellm_gemm", &squeezellm_gemm, "Quantized GEMM for SqueezeLLM");
|
||||
|
||||
// Cache ops
|
||||
|
||||
@@ -20,9 +20,17 @@ __device__ inline unsigned int as_unsigned(int i) {
|
||||
|
||||
// 4-bit matvec kernel (LUT-based)
|
||||
__global__ void NUQ4MatMulKernel(
|
||||
#ifndef USE_ROCM
|
||||
const half2* __restrict__ vec,
|
||||
#else
|
||||
const __half2* __restrict__ vec,
|
||||
#endif
|
||||
const int* __restrict__ mat,
|
||||
#ifndef USE_ROCM
|
||||
half2* __restrict__ mul,
|
||||
#else
|
||||
float2* __restrict__ mul,
|
||||
#endif
|
||||
const __half* __restrict__ lookup_table,
|
||||
int height,
|
||||
int width,
|
||||
@@ -35,7 +43,11 @@ __global__ void NUQ4MatMulKernel(
|
||||
int row = BLOCKHEIGHT4 * blockIdx.x;
|
||||
int col = BLOCKWIDTH * blockIdx.y + threadIdx.x;
|
||||
|
||||
#ifndef USE_ROCM
|
||||
__shared__ half2 blockvec[blockwidth2];
|
||||
#else
|
||||
__shared__ __half2 blockvec[blockwidth2];
|
||||
#endif
|
||||
|
||||
__shared__ __half deq2[16][BLOCKWIDTH];
|
||||
int off = threadIdx.x;
|
||||
@@ -46,8 +58,13 @@ __global__ void NUQ4MatMulKernel(
|
||||
}
|
||||
|
||||
__half res;
|
||||
#ifndef USE_ROCM
|
||||
half2 res2;
|
||||
half2 tmp2;
|
||||
#else
|
||||
__half2 res2;
|
||||
__half2 tmp2;
|
||||
#endif
|
||||
|
||||
int i;
|
||||
int k;
|
||||
@@ -68,48 +85,96 @@ __global__ void NUQ4MatMulKernel(
|
||||
while (k < blockwidth2) {
|
||||
tmp1 = as_unsigned(mat[i]);
|
||||
|
||||
#ifndef USE_ROCM
|
||||
res2 = {};
|
||||
tmp2 = {};
|
||||
#else
|
||||
res2.x = __half_as_ushort(__float2half(0));
|
||||
res2.y = __half_as_ushort(__float2half(0));
|
||||
tmp2.x = __half_as_ushort(__float2half(0));
|
||||
tmp2.y = __half_as_ushort(__float2half(0));
|
||||
#endif
|
||||
|
||||
lut_index1 = tmp1 & 0xF;
|
||||
lut_index2 = (tmp1 >> 4) & 0xF;
|
||||
#ifndef USE_ROCM
|
||||
tmp2.x = deq2[lut_index1][off];
|
||||
tmp2.y = deq2[lut_index2][off];
|
||||
#else
|
||||
tmp2.x = __half_as_ushort(deq2[lut_index1][off]);
|
||||
tmp2.y = __half_as_ushort(deq2[lut_index2][off]);
|
||||
#endif
|
||||
res2 = __hfma2(tmp2, blockvec[k + 0], res2);
|
||||
|
||||
lut_index1 = (tmp1 >> 8) & 0xF;
|
||||
lut_index2 = (tmp1 >> 12) & 0xF;
|
||||
#ifndef USE_ROCM
|
||||
tmp2.x = deq2[lut_index1][off];
|
||||
tmp2.y = deq2[lut_index2][off];
|
||||
#else
|
||||
tmp2.x = __half_as_ushort(deq2[lut_index1][off]);
|
||||
tmp2.y = __half_as_ushort(deq2[lut_index2][off]);
|
||||
#endif
|
||||
res2 = __hfma2(tmp2, blockvec[k + 1], res2);
|
||||
|
||||
lut_index1 = (tmp1 >> 16) & 0xF;
|
||||
lut_index2 = (tmp1 >> 20) & 0xF;
|
||||
#ifndef USE_ROCM
|
||||
tmp2.x = deq2[lut_index1][off];
|
||||
tmp2.y = deq2[lut_index2][off];
|
||||
#else
|
||||
tmp2.x = __half_as_ushort(deq2[lut_index1][off]);
|
||||
tmp2.y = __half_as_ushort(deq2[lut_index2][off]);
|
||||
#endif
|
||||
res2 = __hfma2(tmp2, blockvec[k + 2], res2);
|
||||
|
||||
lut_index1 = (tmp1 >> 24) & 0xF;
|
||||
lut_index2 = (tmp1 >> 28) & 0xF;
|
||||
#ifndef USE_ROCM
|
||||
tmp2.x = deq2[lut_index1][off];
|
||||
tmp2.y = deq2[lut_index2][off];
|
||||
#else
|
||||
tmp2.x = __half_as_ushort(deq2[lut_index1][off]);
|
||||
tmp2.y = __half_as_ushort(deq2[lut_index2][off]);
|
||||
#endif
|
||||
res2 = __hfma2(tmp2, blockvec[k + 3], res2);
|
||||
|
||||
#ifndef USE_ROCM
|
||||
res = __hadd(__hadd(res2.x, res2.y), res);
|
||||
#else
|
||||
res = __hadd(__hadd(__ushort_as_half(res2.x), __ushort_as_half(res2.y)), res);
|
||||
#endif
|
||||
|
||||
i += width;
|
||||
k += 4;
|
||||
}
|
||||
|
||||
// col%2 -> only set one of the two values
|
||||
#ifndef USE_ROCM
|
||||
half2 res3 = {};
|
||||
if (col % 2 == 0) {
|
||||
res3.x = res;
|
||||
} else {
|
||||
res3.y = res;
|
||||
}
|
||||
#else
|
||||
__half2 res3;
|
||||
res3.x = __half_as_ushort(__float2half(0));
|
||||
res3.y = __half_as_ushort(__float2half(0));
|
||||
if (col % 2 == 0) {
|
||||
res3.x = __half_as_ushort(res);
|
||||
} else {
|
||||
res3.y = __half_as_ushort(res);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef USE_ROCM
|
||||
atomicAdd(&mul[b * width / 2 + col / 2], res3);
|
||||
#else
|
||||
int tmp_addr = b * width / 2 + col / 2;
|
||||
atomicAdd(&(mul[tmp_addr].x), __half2float(__ushort_as_half(res3.x)));
|
||||
atomicAdd(&(mul[tmp_addr].y), __half2float(__ushort_as_half(res3.y)));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
@@ -136,10 +201,19 @@ void squeezellm_gemm(
|
||||
dim3 threads(BLOCKWIDTH);
|
||||
|
||||
vllm::squeezellm::NUQ4MatMulKernel<<<blocks, threads>>>(
|
||||
#ifndef USE_ROCM
|
||||
(half2*) vec.data<at::Half>(),
|
||||
#else
|
||||
(__half2*) vec.data_ptr<at::Half>(),
|
||||
#endif
|
||||
mat.data_ptr<int>(),
|
||||
#ifndef USE_ROCM
|
||||
(half2*) mul.data<at::Half>(),
|
||||
(__half*) lookup_table.data<at::Half>(),
|
||||
#else
|
||||
(float2*) mul.data_ptr<float>(),
|
||||
(__half*) lookup_table.data_ptr<at::Half>(),
|
||||
#endif
|
||||
height, width, batch, vec_height
|
||||
);
|
||||
}
|
||||
|
||||
@@ -17,13 +17,15 @@
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include "cuda_compat.h"
|
||||
|
||||
namespace vllm {
|
||||
|
||||
template<typename T>
|
||||
__inline__ __device__ T warpReduceSum(T val) {
|
||||
#pragma unroll
|
||||
for (int mask = 16; mask > 0; mask >>= 1)
|
||||
val += __shfl_xor_sync(0xffffffff, val, mask, 32);
|
||||
val += VLLM_SHFL_XOR_SYNC(val, mask);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user