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[MODEL ADDITION] Ovis2 Model Addition (#15826)

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Signed-off-by: Marco <121761685+mlinmg@users.noreply.github.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
This commit is contained in:
Marco
2025-04-30 09:33:29 +02:00
committed by GitHub
parent be633fba0f
commit 54072f315f
17 changed files with 1349 additions and 7 deletions
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3
vllm/transformers_utils/processors/__init__.py
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@@ -2,5 +2,6 @@
from vllm.transformers_utils.processors.deepseek_vl2 import (
DeepseekVLV2Processor)
from vllm.transformers_utils.processors.ovis2 import OvisProcessor
__all__ = ["DeepseekVLV2Processor"]
__all__ = ["DeepseekVLV2Processor", "OvisProcessor"]