[Model] Refactor Step3-VL processor to HF style (#37579)

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
2026-03-20 14:05:08 +08:00
parent e2d1c8b5e8
commit 30108fc8b0
4 changed files with 235 additions and 167 deletions
--- a/vllm/transformers_utils/processors/internvl.py
+++ b/vllm/transformers_utils/processors/internvl.py
@@ -558,6 +558,7 @@ class InternVLProcessor(ProcessorMixin):
        else:
            text_inputs = {}

-        combined_outputs = {**text_inputs, **image_inputs, **video_inputs}
-
-        return BatchFeature(combined_outputs, tensor_type=return_tensors)
+        return BatchFeature(
+            data={**text_inputs, **image_inputs, **video_inputs},
+            tensor_type=return_tensors,
+        )