2023-04-02 00:30:17 -07:00
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#include <ATen/cuda/CUDAContext.h>
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2024-06-09 16:23:30 -04:00
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#include <torch/all.h>
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2024-01-03 11:09:59 +08:00
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#include <c10/cuda/CUDAGuard.h>
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2023-04-02 00:30:17 -07:00
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2024-02-21 20:17:52 -08:00
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#include <cmath>
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2023-12-08 15:16:52 +08:00
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#include "cuda_compat.h"
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2023-09-02 14:59:47 +09:00
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#include "dispatch_utils.h"
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2023-06-17 03:07:40 -07:00
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namespace vllm {
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2023-04-02 00:30:17 -07:00
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2026-02-11 11:31:51 +08:00
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struct alignas(32) u32x8_t {
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uint32_t u0, u1, u2, u3, u4, u5, u6, u7;
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};
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__device__ __forceinline__ void ld256(u32x8_t& val, const u32x8_t* ptr) {
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#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 1000
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asm volatile("ld.global.nc.v8.u32 {%0,%1,%2,%3,%4,%5,%6,%7}, [%8];\n"
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: "=r"(val.u0), "=r"(val.u1), "=r"(val.u2), "=r"(val.u3),
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"=r"(val.u4), "=r"(val.u5), "=r"(val.u6), "=r"(val.u7)
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: "l"(ptr));
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#else
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const uint4* uint_ptr = reinterpret_cast<const uint4*>(ptr);
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uint4 top_half = __ldg(&uint_ptr[0]);
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uint4 bottom_half = __ldg(&uint_ptr[1]);
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val.u0 = top_half.x;
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val.u1 = top_half.y;
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val.u2 = top_half.z;
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val.u3 = top_half.w;
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val.u4 = bottom_half.x;
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val.u5 = bottom_half.y;
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val.u6 = bottom_half.z;
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val.u7 = bottom_half.w;
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#endif
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}
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__device__ __forceinline__ void st256(u32x8_t& val, u32x8_t* ptr) {
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#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 1000
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asm volatile("st.global.v8.u32 [%0], {%1,%2,%3,%4,%5,%6,%7,%8};\n"
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:
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: "l"(ptr), "r"(val.u0), "r"(val.u1), "r"(val.u2), "r"(val.u3),
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"r"(val.u4), "r"(val.u5), "r"(val.u6), "r"(val.u7)
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: "memory");
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#else
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uint4* uint_ptr = reinterpret_cast<uint4*>(ptr);
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uint_ptr[0] = make_uint4(val.u0, val.u1, val.u2, val.u3);
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uint_ptr[1] = make_uint4(val.u4, val.u5, val.u6, val.u7);
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#endif
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}
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template <bool support_256>
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struct VecTraits;
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template <>
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struct VecTraits<true> {
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static constexpr int ARCH_MAX_VEC_SIZE = 32;
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using vec_t = u32x8_t;
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};
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template <>
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struct VecTraits<false> {
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static constexpr int ARCH_MAX_VEC_SIZE = 16;
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using vec_t = int4;
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};
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template <typename T>
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struct PackedTraits;
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template <>
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struct PackedTraits<c10::BFloat16> {
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using packed_t = __nv_bfloat162;
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};
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template <>
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struct PackedTraits<c10::Half> {
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using packed_t = __half2;
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};
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template <>
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struct PackedTraits<float> {
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using packed_t = float2;
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};
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template <typename packed_t>
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__device__ __forceinline__ float2 cast_to_float2(const packed_t& val) {
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if constexpr (std::is_same_v<packed_t, __nv_bfloat162>) {
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return __bfloat1622float2(val);
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} else if constexpr (std::is_same_v<packed_t, __half2>) {
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return __half22float2(val);
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} else if constexpr (std::is_same_v<packed_t, float2>) {
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return float2(val);
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}
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}
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template <typename packed_t>
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__device__ __forceinline__ packed_t cast_to_packed(const float2& val) {
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if constexpr (std::is_same_v<packed_t, __nv_bfloat162>) {
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return __float22bfloat162_rn(val);
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} else if constexpr (std::is_same_v<packed_t, __half2>) {
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return __float22half2_rn(val);
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} else if constexpr (std::is_same_v<packed_t, float2>) {
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return float2(val);
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}
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}
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template <typename packed_t>
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__device__ __forceinline__ packed_t packed_mul(const packed_t& x,
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const packed_t& y) {
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if constexpr (std::is_same_v<packed_t, __nv_bfloat162> ||
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std::is_same_v<packed_t, __half2>) {
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return __hmul2(x, y);
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} else if constexpr (std::is_same_v<packed_t, float2>) {
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return make_float2(x.x * y.x, x.y * y.y);
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}
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}
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2025-01-15 10:29:53 +08:00
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template <typename scalar_t, scalar_t (*ACT_FN)(const scalar_t&),
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bool act_first>
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__device__ __forceinline__ scalar_t compute(const scalar_t& x,
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const scalar_t& y) {
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return act_first ? ACT_FN(x) * y : x * ACT_FN(y);
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}
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2026-02-11 11:31:51 +08:00
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template <typename packed_t, packed_t (*PACKED_ACT_FN)(const packed_t&),
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bool act_first>
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__device__ __forceinline__ packed_t packed_compute(const packed_t& x,
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const packed_t& y) {
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return act_first ? packed_mul(PACKED_ACT_FN(x), y)
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: packed_mul(x, PACKED_ACT_FN(y));
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}
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2025-12-16 17:56:02 -05:00
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// Check if all pointers are 16-byte aligned for int4 vectorized access
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2026-02-11 11:31:51 +08:00
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__host__ __device__ __forceinline__ bool is_16byte_aligned(const void* ptr) {
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2025-12-16 17:56:02 -05:00
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return (reinterpret_cast<uintptr_t>(ptr) & 15) == 0;
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}
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2026-02-11 11:31:51 +08:00
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// Check if all pointers are 16-byte aligned for longlong4_32a vectorized access
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__host__ __device__ __forceinline__ bool is_32byte_aligned(const void* ptr) {
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return (reinterpret_cast<uintptr_t>(ptr) & 31) == 0;
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}
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2025-12-16 17:56:02 -05:00
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// Activation and gating kernel template.
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2026-02-11 11:31:51 +08:00
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template <typename scalar_t, typename packed_t,
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scalar_t (*ACT_FN)(const scalar_t&),
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packed_t (*PACKED_ACT_FN)(const packed_t&), bool act_first,
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bool use_vec, bool use_256b = false>
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2024-02-21 20:17:52 -08:00
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__global__ void act_and_mul_kernel(
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2024-05-22 03:18:41 -04:00
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scalar_t* __restrict__ out, // [..., d]
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const scalar_t* __restrict__ input, // [..., 2, d]
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const int d) {
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const scalar_t* x_ptr = input + blockIdx.x * 2 * d;
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2025-12-16 17:56:02 -05:00
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const scalar_t* y_ptr = x_ptr + d;
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scalar_t* out_ptr = out + blockIdx.x * d;
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2026-02-11 11:31:51 +08:00
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if constexpr (use_vec) {
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// Fast path: 128-bit/256-bit vectorized loop
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using vec_t = typename VecTraits<use_256b>::vec_t;
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constexpr int ARCH_MAX_VEC_SIZE = VecTraits<use_256b>::ARCH_MAX_VEC_SIZE;
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constexpr int VEC_SIZE = ARCH_MAX_VEC_SIZE / sizeof(packed_t);
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2026-02-11 11:31:51 +08:00
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const vec_t* x_vec = reinterpret_cast<const vec_t*>(x_ptr);
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const vec_t* y_vec = reinterpret_cast<const vec_t*>(y_ptr);
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vec_t* out_vec = reinterpret_cast<vec_t*>(out_ptr);
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const int num_vecs = d / 2 / VEC_SIZE;
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for (int i = threadIdx.x; i < num_vecs; i += blockDim.x) {
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2026-02-11 11:31:51 +08:00
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vec_t x, y;
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if constexpr (use_256b) {
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ld256(x, &x_vec[i]);
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ld256(y, &y_vec[i]);
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} else {
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x = VLLM_LDG(&x_vec[i]);
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y = VLLM_LDG(&y_vec[i]);
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}
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auto* xp = reinterpret_cast<packed_t*>(&x);
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auto* yp = reinterpret_cast<packed_t*>(&y);
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#pragma unroll
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for (int j = 0; j < VEC_SIZE; j++) {
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2026-02-11 11:31:51 +08:00
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xp[j] =
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packed_compute<packed_t, PACKED_ACT_FN, act_first>(xp[j], yp[j]);
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}
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if constexpr (use_256b) {
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st256(x, &out_vec[i]);
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} else {
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out_vec[i] = x;
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2025-12-16 17:56:02 -05:00
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}
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}
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} else {
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// Scalar fallback for unaligned data or small d
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for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
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const scalar_t x = VLLM_LDG(&x_ptr[idx]);
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const scalar_t y = VLLM_LDG(&y_ptr[idx]);
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out_ptr[idx] = compute<scalar_t, ACT_FN, act_first>(x, y);
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}
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2023-04-02 00:30:17 -07:00
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}
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}
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2024-05-22 03:18:41 -04:00
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template <typename T>
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__device__ __forceinline__ T silu_kernel(const T& x) {
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// x * sigmoid(x)
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return (T)(((float)x) / (1.0f + expf((float)-x)));
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2024-02-21 20:17:52 -08:00
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}
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2026-02-11 11:31:51 +08:00
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template <typename packed_t>
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__device__ __forceinline__ packed_t packed_silu_kernel(const packed_t& val) {
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// x * sigmoid(x)
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float2 fval = cast_to_float2(val);
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fval.x = fval.x / (1.0f + expf(-fval.x));
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fval.y = fval.y / (1.0f + expf(-fval.y));
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return cast_to_packed<packed_t>(fval);
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}
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2024-05-22 03:18:41 -04:00
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template <typename T>
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__device__ __forceinline__ T gelu_kernel(const T& x) {
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// Equivalent to PyTorch GELU with 'none' approximation.
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// Refer to:
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2024-03-12 22:06:17 -07:00
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// https://github.com/pytorch/pytorch/blob/8ac9b20d4b090c213799e81acf48a55ea8d437d6/aten/src/ATen/native/cuda/ActivationGeluKernel.cu#L36-L38
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const float f = (float)x;
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constexpr float ALPHA = M_SQRT1_2;
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return (T)(f * 0.5f * (1.0f + ::erf(f * ALPHA)));
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2024-02-21 20:17:52 -08:00
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}
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2026-02-11 11:31:51 +08:00
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template <typename packed_t>
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__device__ __forceinline__ packed_t packed_gelu_kernel(const packed_t& val) {
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// Equivalent to PyTorch GELU with 'none' approximation.
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// Refer to:
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// https://github.com/pytorch/pytorch/blob/8ac9b20d4b090c213799e81acf48a55ea8d437d6/aten/src/ATen/native/cuda/ActivationGeluKernel.cu#L36-L38
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constexpr float ALPHA = M_SQRT1_2;
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float2 fval = cast_to_float2(val);
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fval.x = fval.x * 0.5f * (1.0f + ::erf(fval.x * ALPHA));
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fval.y = fval.y * 0.5f * (1.0f + ::erf(fval.y * ALPHA));
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return cast_to_packed<packed_t>(fval);
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}
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2024-05-22 03:18:41 -04:00
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template <typename T>
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__device__ __forceinline__ T gelu_tanh_kernel(const T& x) {
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// Equivalent to PyTorch GELU with 'tanh' approximation.
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// Refer to:
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// https://github.com/pytorch/pytorch/blob/8ac9b20d4b090c213799e81acf48a55ea8d437d6/aten/src/ATen/native/cuda/ActivationGeluKernel.cu#L25-L30
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const float f = (float)x;
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constexpr float BETA = M_SQRT2 * M_2_SQRTPI * 0.5f;
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constexpr float KAPPA = 0.044715;
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float x_cube = f * f * f;
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float inner = BETA * (f + KAPPA * x_cube);
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return (T)(0.5f * f * (1.0f + ::tanhf(inner)));
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2024-03-12 22:06:17 -07:00
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}
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2026-02-11 11:31:51 +08:00
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template <typename packed_t>
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__device__ __forceinline__ packed_t
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packed_gelu_tanh_kernel(const packed_t& val) {
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// Equivalent to PyTorch GELU with 'tanh' approximation.
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// Refer to:
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// https://github.com/pytorch/pytorch/blob/8ac9b20d4b090c213799e81acf48a55ea8d437d6/aten/src/ATen/native/cuda/ActivationGeluKernel.cu#L25-L30
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float2 fval = cast_to_float2(val);
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constexpr float BETA = M_SQRT2 * M_2_SQRTPI * 0.5f;
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|
constexpr float KAPPA = 0.044715;
|
|
|
|
|
|
|
|
|
|
float x_cube = fval.x * fval.x * fval.x;
|
|
|
|
|
float inner = BETA * (fval.x + KAPPA * x_cube);
|
|
|
|
|
fval.x = 0.5f * fval.x * (1.0f + ::tanhf(inner));
|
|
|
|
|
|
|
|
|
|
x_cube = fval.y * fval.y * fval.y;
|
|
|
|
|
inner = BETA * (fval.y + KAPPA * x_cube);
|
|
|
|
|
fval.y = 0.5f * fval.y * (1.0f + ::tanhf(inner));
|
|
|
|
|
return cast_to_packed<packed_t>(fval);
|
|
|
|
|
}
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
} // namespace vllm
|
2023-04-02 00:30:17 -07:00
|
|
|
|
2024-02-21 20:17:52 -08:00
|
|
|
// Launch activation and gating kernel.
|
2025-01-15 10:29:53 +08:00
|
|
|
// Use ACT_FIRST (bool) indicating whether to apply the activation function
|
|
|
|
|
// first.
|
2026-02-11 11:31:51 +08:00
|
|
|
#define LAUNCH_ACTIVATION_GATE_KERNEL(KERNEL, PACKED_KERNEL, ACT_FIRST) \
|
|
|
|
|
auto dtype = input.scalar_type(); \
|
|
|
|
|
int d = input.size(-1) / 2; \
|
|
|
|
|
int64_t num_tokens = input.numel() / input.size(-1); \
|
|
|
|
|
if (num_tokens == 0) { \
|
|
|
|
|
return; \
|
|
|
|
|
} \
|
|
|
|
|
dim3 grid(num_tokens); \
|
|
|
|
|
int cc_major = at::cuda::getCurrentDeviceProperties()->major; \
|
|
|
|
|
int support_vec = (cc_major >= 10 && num_tokens > 128) ? 32 : 16; \
|
|
|
|
|
int vec_size = support_vec / at::elementSize(dtype); \
|
|
|
|
|
const bool use_vec = (d % vec_size == 0); \
|
|
|
|
|
const at::cuda::OptionalCUDAGuard device_guard(device_of(input)); \
|
|
|
|
|
const cudaStream_t stream = at::cuda::getCurrentCUDAStream(); \
|
|
|
|
|
if (use_vec) { \
|
|
|
|
|
dim3 block(std::min(d / vec_size, 1024)); \
|
|
|
|
|
if (cc_major >= 10 && num_tokens > 128) { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "act_and_mul_kernel", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL<typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
ACT_FIRST, true, true><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
} else { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "act_and_mul_kernel", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL<typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
ACT_FIRST, true, false><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
} \
|
|
|
|
|
} else { \
|
|
|
|
|
dim3 block(std::min(d, 1024)); \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "act_and_mul_kernel", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL<typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
ACT_FIRST, false><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
}
|
2024-05-22 03:18:41 -04:00
|
|
|
|
|
|
|
|
void silu_and_mul(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., 2 * d]
|
2023-04-02 00:30:17 -07:00
|
|
|
{
|
2026-02-11 11:31:51 +08:00
|
|
|
LAUNCH_ACTIVATION_GATE_KERNEL(vllm::silu_kernel, vllm::packed_silu_kernel,
|
|
|
|
|
true);
|
2025-01-15 10:29:53 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void mul_and_silu(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., 2 * d]
|
|
|
|
|
{
|
|
|
|
|
// The difference between mul_and_silu and silu_and_mul is that mul_and_silu
|
|
|
|
|
// applies the silu to the latter half of the input.
|
2026-02-11 11:31:51 +08:00
|
|
|
LAUNCH_ACTIVATION_GATE_KERNEL(vllm::silu_kernel, vllm::packed_silu_kernel,
|
|
|
|
|
false);
|
2024-02-21 20:17:52 -08:00
|
|
|
}
|
2023-04-02 00:30:17 -07:00
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
void gelu_and_mul(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., 2 * d]
|
2024-02-21 20:17:52 -08:00
|
|
|
{
|
2026-02-11 11:31:51 +08:00
|
|
|
LAUNCH_ACTIVATION_GATE_KERNEL(vllm::gelu_kernel, vllm::packed_gelu_kernel,
|
|
|
|
|
true);
|
2023-04-02 00:30:17 -07:00
|
|
|
}
|
2023-08-23 07:43:21 +09:00
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
void gelu_tanh_and_mul(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., 2 * d]
|
2024-03-12 22:06:17 -07:00
|
|
|
{
|
2026-02-11 11:31:51 +08:00
|
|
|
LAUNCH_ACTIVATION_GATE_KERNEL(vllm::gelu_tanh_kernel,
|
|
|
|
|
vllm::packed_gelu_tanh_kernel, true);
|
2024-03-12 22:06:17 -07:00
|
|
|
}
|
|
|
|
|
|
2023-08-23 07:43:21 +09:00
|
|
|
namespace vllm {
|
|
|
|
|
|
2024-10-24 16:18:27 +08:00
|
|
|
template <typename T>
|
|
|
|
|
__device__ __forceinline__ T fatrelu_kernel(const T& x, const float threshold) {
|
|
|
|
|
const float f = (float)x;
|
|
|
|
|
return (T)(f > threshold ? f : 0.0f);
|
|
|
|
|
}
|
|
|
|
|
|
2026-02-11 11:31:51 +08:00
|
|
|
template <typename packed_t>
|
|
|
|
|
__device__ __forceinline__ packed_t
|
|
|
|
|
packed_fatrelu_kernel(const packed_t& val, const float threshold) {
|
|
|
|
|
float2 fval = cast_to_float2(val);
|
|
|
|
|
fval.x = fval.x > threshold ? fval.x : 0.0f;
|
|
|
|
|
fval.y = fval.y > threshold ? fval.y : 0.0f;
|
|
|
|
|
return cast_to_packed<packed_t>(fval);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
template <typename scalar_t, typename packed_t,
|
|
|
|
|
scalar_t (*ACT_FN)(const scalar_t&, const float),
|
|
|
|
|
packed_t (*PACKED_ACT_FN)(const packed_t&, const float), bool use_vec,
|
|
|
|
|
bool use_256b = false>
|
2024-10-24 16:18:27 +08:00
|
|
|
__global__ void act_and_mul_kernel_with_param(
|
|
|
|
|
scalar_t* __restrict__ out, const scalar_t* __restrict__ input, const int d,
|
|
|
|
|
const float param) {
|
2026-02-11 11:31:51 +08:00
|
|
|
const scalar_t* x_ptr = input + blockIdx.x * 2 * d;
|
2025-12-16 17:56:02 -05:00
|
|
|
const scalar_t* y_ptr = x_ptr + d;
|
2026-02-11 11:31:51 +08:00
|
|
|
scalar_t* out_ptr = out + blockIdx.x * d;
|
2025-12-16 17:56:02 -05:00
|
|
|
|
2026-02-11 11:31:51 +08:00
|
|
|
if constexpr (use_vec) {
|
|
|
|
|
// Fast path: 128-bit/256-bit vectorized loop
|
|
|
|
|
using vec_t = typename VecTraits<use_256b>::vec_t;
|
|
|
|
|
constexpr int ARCH_MAX_VEC_SIZE = VecTraits<use_256b>::ARCH_MAX_VEC_SIZE;
|
|
|
|
|
constexpr int VEC_SIZE = ARCH_MAX_VEC_SIZE / sizeof(packed_t);
|
2025-12-16 17:56:02 -05:00
|
|
|
|
2026-02-11 11:31:51 +08:00
|
|
|
const vec_t* x_vec = reinterpret_cast<const vec_t*>(x_ptr);
|
|
|
|
|
const vec_t* y_vec = reinterpret_cast<const vec_t*>(y_ptr);
|
|
|
|
|
vec_t* out_vec = reinterpret_cast<vec_t*>(out_ptr);
|
|
|
|
|
const int num_vecs = d / 2 / VEC_SIZE;
|
2025-12-16 17:56:02 -05:00
|
|
|
|
|
|
|
|
for (int i = threadIdx.x; i < num_vecs; i += blockDim.x) {
|
2026-02-11 11:31:51 +08:00
|
|
|
vec_t x, y;
|
|
|
|
|
if constexpr (use_256b) {
|
|
|
|
|
ld256(x, &x_vec[i]);
|
|
|
|
|
ld256(y, &y_vec[i]);
|
|
|
|
|
} else {
|
|
|
|
|
x = VLLM_LDG(&x_vec[i]);
|
|
|
|
|
y = VLLM_LDG(&y_vec[i]);
|
|
|
|
|
}
|
|
|
|
|
auto* xp = reinterpret_cast<packed_t*>(&x);
|
|
|
|
|
auto* yp = reinterpret_cast<packed_t*>(&y);
|
2025-12-16 17:56:02 -05:00
|
|
|
#pragma unroll
|
|
|
|
|
for (int j = 0; j < VEC_SIZE; j++) {
|
2026-02-11 11:31:51 +08:00
|
|
|
xp[j] = packed_mul(PACKED_ACT_FN(xp[j], param), yp[j]);
|
|
|
|
|
}
|
|
|
|
|
if constexpr (use_256b) {
|
|
|
|
|
st256(x, &out_vec[i]);
|
|
|
|
|
} else {
|
|
|
|
|
out_vec[i] = x;
|
2025-12-16 17:56:02 -05:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
// Scalar fallback for unaligned data or small d
|
|
|
|
|
for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
|
|
|
|
|
const scalar_t x = VLLM_LDG(&x_ptr[idx]);
|
|
|
|
|
const scalar_t y = VLLM_LDG(&y_ptr[idx]);
|
|
|
|
|
out_ptr[idx] = ACT_FN(x, param) * y;
|
|
|
|
|
}
|
2024-10-24 16:18:27 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2025-08-17 13:03:24 +08:00
|
|
|
template <typename T>
|
|
|
|
|
__device__ __forceinline__ T swigluoai_and_mul(const T& gate, const T& up,
|
|
|
|
|
float alpha, float limit) {
|
2025-12-16 17:56:02 -05:00
|
|
|
// Clamp gate to (-inf, limit] and up to [-limit, limit]
|
|
|
|
|
const float g = fminf((float)gate, limit);
|
|
|
|
|
const float u = fmaxf(fminf((float)up, limit), -limit);
|
|
|
|
|
// glu = gate * sigmoid(gate * alpha), then return (up + 1) * glu
|
|
|
|
|
return (T)((u + 1.0f) * g / (1.0f + expf(-g * alpha)));
|
2025-08-17 13:03:24 +08:00
|
|
|
}
|
|
|
|
|
|
2025-12-16 17:56:02 -05:00
|
|
|
// Interleaved gate/up: input has [gate0, up0, gate1, up1, ...].
|
2025-08-17 13:03:24 +08:00
|
|
|
template <typename scalar_t,
|
|
|
|
|
scalar_t (*ACT_FN)(const scalar_t&, const scalar_t&, const float,
|
|
|
|
|
const float)>
|
|
|
|
|
__global__ void swigluoai_and_mul_kernel(
|
|
|
|
|
scalar_t* __restrict__ out, // [..., d]
|
2025-12-16 17:56:02 -05:00
|
|
|
const scalar_t* __restrict__ input, // [..., 2 * d] (interleaved)
|
2025-08-17 13:03:24 +08:00
|
|
|
const int d, const float alpha, const float limit) {
|
2025-12-16 17:56:02 -05:00
|
|
|
// For interleaved data: input has 2*d elements per token (gate/up pairs)
|
|
|
|
|
// output has d elements per token
|
|
|
|
|
constexpr int VEC_SIZE = 16 / sizeof(scalar_t);
|
|
|
|
|
constexpr int PAIRS = VEC_SIZE / 2; // Number of gate/up pairs per int4 load
|
2025-08-17 13:03:24 +08:00
|
|
|
const int64_t token_idx = blockIdx.x;
|
2025-12-16 17:56:02 -05:00
|
|
|
const scalar_t* in_ptr = input + token_idx * 2 * d;
|
|
|
|
|
scalar_t* out_ptr = out + token_idx * d;
|
|
|
|
|
|
|
|
|
|
// Check alignment for 128-bit vectorized access on input.
|
|
|
|
|
// For output we use int2 (64-bit) which has 8-byte alignment requirement.
|
|
|
|
|
const bool in_aligned = is_16byte_aligned(in_ptr);
|
|
|
|
|
const bool out_aligned =
|
|
|
|
|
(reinterpret_cast<uintptr_t>(out_ptr) & 7) == 0; // 8-byte for int2
|
|
|
|
|
|
|
|
|
|
if (in_aligned && out_aligned && d >= PAIRS) {
|
|
|
|
|
// Fast path: vectorized loop
|
|
|
|
|
// Each int4 load gives VEC_SIZE elements = PAIRS gate/up pairs
|
|
|
|
|
// Each int2 store writes PAIRS output elements
|
|
|
|
|
const int4* in_vec = reinterpret_cast<const int4*>(in_ptr);
|
|
|
|
|
int2* out_vec = reinterpret_cast<int2*>(out_ptr);
|
|
|
|
|
const int num_vecs = d / PAIRS;
|
|
|
|
|
const int vec_end = num_vecs * PAIRS;
|
|
|
|
|
|
|
|
|
|
for (int i = threadIdx.x; i < num_vecs; i += blockDim.x) {
|
|
|
|
|
int4 v = VLLM_LDG(&in_vec[i]);
|
|
|
|
|
int2 r;
|
|
|
|
|
auto* vp = reinterpret_cast<scalar_t*>(&v);
|
|
|
|
|
auto* rp = reinterpret_cast<scalar_t*>(&r);
|
|
|
|
|
#pragma unroll
|
|
|
|
|
for (int j = 0; j < PAIRS; j++) {
|
|
|
|
|
rp[j] = ACT_FN(vp[2 * j], vp[2 * j + 1], alpha, limit);
|
|
|
|
|
}
|
|
|
|
|
out_vec[i] = r;
|
|
|
|
|
}
|
|
|
|
|
// Scalar cleanup for remaining elements
|
|
|
|
|
for (int i = vec_end + threadIdx.x; i < d; i += blockDim.x) {
|
|
|
|
|
out_ptr[i] = ACT_FN(VLLM_LDG(&in_ptr[2 * i]),
|
|
|
|
|
VLLM_LDG(&in_ptr[2 * i + 1]), alpha, limit);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
// Scalar fallback for unaligned data or small d
|
|
|
|
|
for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
|
|
|
|
|
// gate = x[..., ::2] (even indices)
|
|
|
|
|
const scalar_t gate = VLLM_LDG(&in_ptr[2 * idx]);
|
|
|
|
|
// up = x[..., 1::2] (odd indices)
|
|
|
|
|
const scalar_t up = VLLM_LDG(&in_ptr[2 * idx + 1]);
|
|
|
|
|
out_ptr[idx] = ACT_FN(gate, up, alpha, limit);
|
|
|
|
|
}
|
2025-08-17 13:03:24 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2024-10-24 16:18:27 +08:00
|
|
|
} // namespace vllm
|
|
|
|
|
|
2026-02-11 11:31:51 +08:00
|
|
|
#define LAUNCH_ACTIVATION_GATE_KERNEL_WITH_PARAM(KERNEL, PACKED_KERNEL, PARAM) \
|
|
|
|
|
auto dtype = input.scalar_type(); \
|
|
|
|
|
int d = input.size(-1) / 2; \
|
|
|
|
|
int64_t num_tokens = input.numel() / input.size(-1); \
|
|
|
|
|
if (num_tokens == 0) { \
|
|
|
|
|
return; \
|
|
|
|
|
} \
|
|
|
|
|
dim3 grid(num_tokens); \
|
|
|
|
|
int cc_major = at::cuda::getCurrentDeviceProperties()->major; \
|
|
|
|
|
int support_vec = (cc_major >= 10 && num_tokens > 128) ? 32 : 16; \
|
|
|
|
|
int vec_size = support_vec / at::elementSize(dtype); \
|
|
|
|
|
const bool use_vec = (d % vec_size == 0); \
|
|
|
|
|
const at::cuda::OptionalCUDAGuard device_guard(device_of(input)); \
|
|
|
|
|
const cudaStream_t stream = at::cuda::getCurrentCUDAStream(); \
|
|
|
|
|
if (use_vec) { \
|
|
|
|
|
dim3 block(std::min(d / vec_size, 1024)); \
|
|
|
|
|
if (cc_major >= 10 && num_tokens > 128) { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES( \
|
|
|
|
|
dtype, "act_and_mul_kernel_with_param", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel_with_param< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL< \
|
|
|
|
|
typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
true, true><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d, \
|
|
|
|
|
PARAM); \
|
|
|
|
|
}); \
|
|
|
|
|
} else { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES( \
|
|
|
|
|
dtype, "act_and_mul_kernel_with_param", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel_with_param< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL< \
|
|
|
|
|
typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
true, false><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d, \
|
|
|
|
|
PARAM); \
|
|
|
|
|
}); \
|
|
|
|
|
} \
|
|
|
|
|
} else { \
|
|
|
|
|
dim3 block(std::min(d, 1024)); \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "act_and_mul_kernel_with_param", [&] { \
|
|
|
|
|
vllm::act_and_mul_kernel_with_param< \
|
|
|
|
|
scalar_t, typename vllm::PackedTraits<scalar_t>::packed_t, \
|
|
|
|
|
KERNEL<scalar_t>, \
|
|
|
|
|
PACKED_KERNEL<typename vllm::PackedTraits<scalar_t>::packed_t>, \
|
|
|
|
|
false><<<grid, block, 0, stream>>>( \
|
|
|
|
|
out.data_ptr<scalar_t>(), input.data_ptr<scalar_t>(), d, PARAM); \
|
|
|
|
|
}); \
|
|
|
|
|
}
|
2024-10-24 16:18:27 +08:00
|
|
|
|
2025-08-17 13:03:24 +08:00
|
|
|
#define LAUNCH_SIGLUOAI_AND_MUL(KERNEL, ALPHA, LIMIT) \
|
|
|
|
|
int d = input.size(-1) / 2; \
|
|
|
|
|
int64_t num_tokens = input.numel() / input.size(-1); \
|
|
|
|
|
dim3 grid(num_tokens); \
|
|
|
|
|
dim3 block(std::min(d, 1024)); \
|
|
|
|
|
const at::cuda::OptionalCUDAGuard device_guard(device_of(input)); \
|
|
|
|
|
const cudaStream_t stream = at::cuda::getCurrentCUDAStream(); \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES( \
|
|
|
|
|
input.scalar_type(), "clamp_swiglu_kernel_with_params", [&] { \
|
|
|
|
|
vllm::swigluoai_and_mul_kernel<scalar_t, KERNEL<scalar_t>> \
|
|
|
|
|
<<<grid, block, 0, stream>>>(out.data_ptr<scalar_t>(), \
|
|
|
|
|
input.data_ptr<scalar_t>(), d, ALPHA, \
|
|
|
|
|
LIMIT); \
|
|
|
|
|
});
|
|
|
|
|
|
2024-10-24 16:18:27 +08:00
|
|
|
void fatrelu_and_mul(torch::Tensor& out, // [..., d],
|
|
|
|
|
torch::Tensor& input, // [..., 2 * d]
|
|
|
|
|
double threshold) {
|
2026-02-11 11:31:51 +08:00
|
|
|
LAUNCH_ACTIVATION_GATE_KERNEL_WITH_PARAM(
|
|
|
|
|
vllm::fatrelu_kernel, vllm::packed_fatrelu_kernel, threshold);
|
2024-10-24 16:18:27 +08:00
|
|
|
}
|
2025-08-17 13:03:24 +08:00
|
|
|
void swigluoai_and_mul(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input, // [..., 2 * d]
|
|
|
|
|
double alpha, double limit) {
|
|
|
|
|
LAUNCH_SIGLUOAI_AND_MUL(vllm::swigluoai_and_mul, alpha, limit);
|
|
|
|
|
}
|
2024-10-24 16:18:27 +08:00
|
|
|
namespace vllm {
|
|
|
|
|
|
2023-08-23 07:43:21 +09:00
|
|
|
// Element-wise activation kernel template.
|
2026-02-11 11:31:51 +08:00
|
|
|
template <typename scalar_t, scalar_t (*ACT_FN)(const scalar_t&), bool use_vec,
|
|
|
|
|
bool use_256b = false>
|
2023-08-23 07:43:21 +09:00
|
|
|
__global__ void activation_kernel(
|
2024-05-22 03:18:41 -04:00
|
|
|
scalar_t* __restrict__ out, // [..., d]
|
|
|
|
|
const scalar_t* __restrict__ input, // [..., d]
|
|
|
|
|
const int d) {
|
2026-02-11 11:31:51 +08:00
|
|
|
const scalar_t* in_ptr = input + blockIdx.x * d;
|
|
|
|
|
scalar_t* out_ptr = out + blockIdx.x * d;
|
|
|
|
|
|
|
|
|
|
if constexpr (use_vec) {
|
|
|
|
|
// Fast path: 128-bit/256-bit vectorized loop
|
|
|
|
|
using vec_t = typename VecTraits<use_256b>::vec_t;
|
|
|
|
|
constexpr int ARCH_MAX_VEC_SIZE = VecTraits<use_256b>::ARCH_MAX_VEC_SIZE;
|
|
|
|
|
constexpr int VEC_SIZE = ARCH_MAX_VEC_SIZE / sizeof(scalar_t);
|
|
|
|
|
const vec_t* in_vec = reinterpret_cast<const vec_t*>(in_ptr);
|
|
|
|
|
vec_t* out_vec = reinterpret_cast<vec_t*>(out_ptr);
|
2025-12-16 17:56:02 -05:00
|
|
|
const int num_vecs = d / VEC_SIZE;
|
|
|
|
|
|
|
|
|
|
for (int i = threadIdx.x; i < num_vecs; i += blockDim.x) {
|
2026-02-11 11:31:51 +08:00
|
|
|
vec_t v;
|
|
|
|
|
if constexpr (use_256b) {
|
|
|
|
|
ld256(v, &in_vec[i]);
|
|
|
|
|
} else {
|
|
|
|
|
v = VLLM_LDG(&in_vec[i]);
|
|
|
|
|
}
|
2025-12-16 17:56:02 -05:00
|
|
|
auto* vp = reinterpret_cast<scalar_t*>(&v);
|
|
|
|
|
#pragma unroll
|
|
|
|
|
for (int j = 0; j < VEC_SIZE; j++) {
|
2026-02-11 11:31:51 +08:00
|
|
|
vp[j] = ACT_FN(vp[j]);
|
|
|
|
|
}
|
|
|
|
|
if constexpr (use_256b) {
|
|
|
|
|
st256(v, &out_vec[i]);
|
|
|
|
|
} else {
|
|
|
|
|
out_vec[i] = v;
|
2025-12-16 17:56:02 -05:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
// Scalar fallback for unaligned data or small d
|
|
|
|
|
for (int64_t idx = threadIdx.x; idx < d; idx += blockDim.x) {
|
|
|
|
|
const scalar_t x = VLLM_LDG(&in_ptr[idx]);
|
|
|
|
|
out_ptr[idx] = ACT_FN(x);
|
|
|
|
|
}
|
2023-08-23 07:43:21 +09:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
} // namespace vllm
|
2023-08-23 07:43:21 +09:00
|
|
|
|
|
|
|
|
// Launch element-wise activation kernel.
|
2026-02-11 11:31:51 +08:00
|
|
|
#define LAUNCH_ACTIVATION_KERNEL(KERNEL) \
|
|
|
|
|
auto dtype = input.scalar_type(); \
|
|
|
|
|
int d = input.size(-1); \
|
|
|
|
|
int64_t num_tokens = input.numel() / input.size(-1); \
|
|
|
|
|
if (num_tokens == 0) { \
|
|
|
|
|
return; \
|
|
|
|
|
} \
|
|
|
|
|
dim3 grid(num_tokens); \
|
|
|
|
|
int cc_major = at::cuda::getCurrentDeviceProperties()->major; \
|
|
|
|
|
int support_vec = (cc_major >= 10 && num_tokens > 128) ? 32 : 16; \
|
|
|
|
|
int vec_size = support_vec / at::elementSize(dtype); \
|
|
|
|
|
const bool use_vec = (d % vec_size == 0); \
|
|
|
|
|
const at::cuda::OptionalCUDAGuard device_guard(device_of(input)); \
|
|
|
|
|
const cudaStream_t stream = at::cuda::getCurrentCUDAStream(); \
|
|
|
|
|
if (use_vec) { \
|
|
|
|
|
dim3 block(std::min(d / vec_size, 1024)); \
|
|
|
|
|
if (cc_major >= 10 && num_tokens > 128) { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "activation_kernel", [&] { \
|
|
|
|
|
vllm::activation_kernel<scalar_t, KERNEL<scalar_t>, true, true> \
|
|
|
|
|
<<<grid, block, 0, stream>>>(out.data_ptr<scalar_t>(), \
|
|
|
|
|
input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
} else { \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "activation_kernel", [&] { \
|
|
|
|
|
vllm::activation_kernel<scalar_t, KERNEL<scalar_t>, true, false> \
|
|
|
|
|
<<<grid, block, 0, stream>>>(out.data_ptr<scalar_t>(), \
|
|
|
|
|
input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
} \
|
|
|
|
|
} else { \
|
|
|
|
|
dim3 block(std::min(d, 1024)); \
|
|
|
|
|
VLLM_DISPATCH_FLOATING_TYPES(dtype, "activation_kernel", [&] { \
|
|
|
|
|
vllm::activation_kernel<scalar_t, KERNEL<scalar_t>, false> \
|
|
|
|
|
<<<grid, block, 0, stream>>>(out.data_ptr<scalar_t>(), \
|
|
|
|
|
input.data_ptr<scalar_t>(), d); \
|
|
|
|
|
}); \
|
|
|
|
|
}
|
2023-08-23 07:43:21 +09:00
|
|
|
|
|
|
|
|
namespace vllm {
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
template <typename T>
|
2023-08-23 07:43:21 +09:00
|
|
|
__device__ __forceinline__ T gelu_new_kernel(const T& x) {
|
2024-05-22 03:18:41 -04:00
|
|
|
const float x3 = (float)(x * x * x);
|
|
|
|
|
const T t = (T)tanhf((T)(0.79788456f * (float)(x + (T)(0.044715f * x3))));
|
|
|
|
|
return ((T)0.5) * x * (((T)1.0) + t);
|
2023-08-23 07:43:21 +09:00
|
|
|
}
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
template <typename T>
|
2023-08-23 07:43:21 +09:00
|
|
|
__device__ __forceinline__ T gelu_fast_kernel(const T& x) {
|
2024-05-22 03:18:41 -04:00
|
|
|
const float f = (float)x;
|
|
|
|
|
const T t =
|
|
|
|
|
(T)tanhf(((T)(f * 0.79788456f)) * (((T)1.0) + (T)(0.044715f * f) * x));
|
|
|
|
|
return ((T)0.5) * x * (((T)1.0) + t);
|
2023-08-23 07:43:21 +09:00
|
|
|
}
|
|
|
|
|
|
2024-06-20 04:52:09 -07:00
|
|
|
template <typename T>
|
|
|
|
|
__device__ __forceinline__ T gelu_quick_kernel(const T& x) {
|
|
|
|
|
// x * sigmoid(1.702 * x)
|
|
|
|
|
return (T)(((float)x) / (1.0f + expf(-1.702f * (float)x)));
|
|
|
|
|
}
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
} // namespace vllm
|
2023-08-23 07:43:21 +09:00
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
void gelu_new(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., d]
|
2023-08-23 07:43:21 +09:00
|
|
|
{
|
|
|
|
|
LAUNCH_ACTIVATION_KERNEL(vllm::gelu_new_kernel);
|
|
|
|
|
}
|
|
|
|
|
|
2024-05-22 03:18:41 -04:00
|
|
|
void gelu_fast(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., d]
|
2023-08-23 07:43:21 +09:00
|
|
|
{
|
|
|
|
|
LAUNCH_ACTIVATION_KERNEL(vllm::gelu_fast_kernel);
|
|
|
|
|
}
|
2024-06-20 04:52:09 -07:00
|
|
|
|
|
|
|
|
void gelu_quick(torch::Tensor& out, // [..., d]
|
|
|
|
|
torch::Tensor& input) // [..., d]
|
|
|
|
|
{
|
|
|
|
|
LAUNCH_ACTIVATION_KERNEL(vllm::gelu_quick_kernel);
|
|
|
|
|
}
|