biondizzle
9cbdc92744
- Split bridge.py -> ops/quantize.py, ops/layouts.py, ops/gemm_runner.py - Renamed classes: CuTeDSLNvfp4Linear -> Nvfp4Linear, etc. - Moved kernel code to dsv4/kernels/ (gemm, attention, compressor, decode, cuda) - Moved PyTorch bridges to dsv4/ops/ - Moved nn.Module layers to dsv4layers/ - Moved reference implementations to dsv4/reference/ - Moved vendored CUTLASS code to vendored/ - Archived ~190 debug tests to tests/archive/ - Kept ~15 canonical tests in tests/unit/ - Updated all import paths - Added stubs for future components (model/, cache/, loader/) - Updated pyproject.toml: dsv4-inference package name
223 lines
15 KiB
Python
223 lines
15 KiB
Python
"""
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Test (128,64) PV WITHOUT softmax.
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QK writes S to TMEM. Then PV uses S directly as P (no BF16 conversion).
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If the C-fragment store path works, PV should read S and produce output.
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If PV reads zeros, the P/A alias is broken for (128,64).
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"""
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import torch, cutlass, cutlass.cute as cute, cutlass.utils as utils, cutlass.pipeline as pipeline
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from cutlass.cute.nvgpu import cpasync, tcgen05
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from cutlass import Float32, BFloat16, Int32, Boolean, const_expr
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from cutlass.utils import LayoutEnum
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from cutlass.utils.tmem_allocator import find_tmem_tensor_col_offset
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import cuda.bindings.driver as cuda
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import cutlass.torch as ct
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HEAD_DIM = 64
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class Pv64NoSoftmax:
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def __init__(self):
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self.acc_dtype = Float32; self.qk_acc_dtype = Float32
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self.q_dtype = BFloat16; self.o_dtype = BFloat16; self.c_dtype = BFloat16
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self.use_2cta_instrs = False; self.epilog_sync_bar_id = 1
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self.cluster_shape_mn = (1, 1); self.cta_group = tcgen05.CtaGroup.ONE
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self.epilogue_warp_id = (0,1,2,3); self.mma_warp_id = 4; self.tma_warp_id = 5
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self.threads_per_cta = 192; self.num_c_stage = 2
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self.num_ab_stage = 1; self.num_acc_stage = 1
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def _setup(self, qk_mma, pv_mma):
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qk_ik = cute.size(qk_mma.shape_mnk, mode=[2])
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self.qk_mma_tiler = (128, 128, qk_ik * 4)
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pv_ik = cute.size(pv_mma.shape_mnk, mode=[2])
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self.pv_mma_tiler = (128, HEAD_DIM, pv_ik * (128 // pv_ik))
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self.mma_tiler = self.qk_mma_tiler
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self.cluster_layout_vmnk = cute.tiled_divide(cute.make_layout((1,1,1)), (qk_mma.thr_id.shape,))
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self.cta_tile_shape_mnk = (self.qk_mma_tiler[0]//cute.size(qk_mma.thr_id.shape), HEAD_DIM, self.qk_mma_tiler[2])
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self.c_layout = LayoutEnum.ROW_MAJOR
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self.epi_tile = utils.sm100.compute_epilogue_tile_shape(self.cta_tile_shape_mnk, False, self.c_layout, self.o_dtype)
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self.a_smem_s = utils.sm100.make_smem_layout_a(qk_mma, self.mma_tiler, self.q_dtype, 1)
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self.b_smem_s = utils.sm100.make_smem_layout_b(qk_mma, self.mma_tiler, self.q_dtype, 1)
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self.v_smem_s = utils.sm100.make_smem_layout_b(pv_mma, self.pv_mma_tiler, self.q_dtype, 1)
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self.p_tmem_s = utils.sm100.make_smem_layout_a(pv_mma, self.pv_mma_tiler, self.q_dtype, 1)
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self.c_smem_s = utils.sm100.make_smem_layout_epi(self.o_dtype, self.c_layout, self.epi_tile, 2)
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qk_thr = qk_mma.get_slice(0); qk_as = qk_thr.partition_shape_C(self.qk_mma_tiler[:2])
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tStS = qk_thr.make_fragment_C(qk_as)
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pv_thr = pv_mma.get_slice(0); pv_as = pv_thr.partition_shape_C(self.pv_mma_tiler[:2])
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tOtO = pv_thr.make_fragment_C(pv_as)
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self.tmem_s0_offset = 0; self.tmem_p0_offset =32
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self.tmem_o0_offset = find_tmem_tensor_col_offset(tOtO)
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tCS = qk_mma.make_fragment_C(cute.append(qk_as, self.num_acc_stage))
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tCO = pv_mma.make_fragment_C(cute.append(pv_as, self.num_acc_stage))
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self.num_tmem_alloc_cols = utils.get_num_tmem_alloc_cols([tCS, tCO], arch="sm_100")
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a_s = cute.slice_(self.a_smem_s,(None,None,None,0)); b_s = cute.slice_(self.b_smem_s,(None,None,None,0))
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v_s = cute.slice_(self.v_smem_s,(None,None,None,0))
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self.num_tma_load_bytes = (cute.size_in_bytes(self.q_dtype,a_s)+cute.size_in_bytes(self.q_dtype,b_s)+cute.size_in_bytes(self.q_dtype,v_s))*cute.size(qk_mma.thr_id.shape)
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@cute.jit
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def __call__(self, q, k, v, c, stream):
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self.q_dtype = q.element_type; self.o_dtype = c.element_type; self.c_dtype = self.o_dtype
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self.a_major = LayoutEnum.from_tensor(q).mma_major_mode()
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self.b_major = LayoutEnum.from_tensor(k).mma_major_mode()
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self.v_major = LayoutEnum.from_tensor(v).mma_major_mode()
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self.c_layout = LayoutEnum.from_tensor(c)
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qk_mma = utils.sm100.make_trivial_tiled_mma(self.q_dtype, self.q_dtype, self.a_major, self.b_major, self.qk_acc_dtype, self.cta_group, (128,128), tcgen05.OperandSource.SMEM)
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pv_mma = utils.sm100.make_trivial_tiled_mma(self.q_dtype, self.q_dtype, cute.nvgpu.OperandMajorMode.K, self.v_major, self.qk_acc_dtype, self.cta_group, (128,HEAD_DIM), tcgen05.OperandSource.TMEM)
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self._setup(qk_mma, pv_mma)
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q_s = cute.slice_(self.a_smem_s,(None,None,None,0)); k_s = cute.slice_(self.b_smem_s,(None,None,None,0))
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v_s = cute.slice_(self.v_smem_s,(None,None,None,0))
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tma_q,mQ = cute.nvgpu.make_tiled_tma_atom_A(utils.sm100.cluster_shape_to_tma_atom_A(self.cluster_shape_mn,qk_mma.thr_id),q,q_s,self.mma_tiler,qk_mma,self.cluster_layout_vmnk.shape)
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tma_k,mK = cute.nvgpu.make_tiled_tma_atom_B(utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn,qk_mma.thr_id),k,k_s,self.mma_tiler,qk_mma,self.cluster_layout_vmnk.shape)
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tma_v,mV = cute.nvgpu.make_tiled_tma_atom_B(utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn,pv_mma.thr_id),v,v_s,self.pv_mma_tiler,pv_mma,self.cluster_layout_vmnk.shape)
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epi_s = cute.select(self.c_smem_s,mode=[0,1])
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tma_c,mC = cpasync.make_tiled_tma_atom(cpasync.CopyBulkTensorTileS2GOp(),c,epi_s,self.epi_tile)
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self._kernel(qk_mma,pv_mma,tma_q,mQ,tma_k,mK,tma_v,mV,tma_c,mC,self.cluster_layout_vmnk,self.a_smem_s,self.b_smem_s,self.v_smem_s,self.p_tmem_s,self.c_smem_s,self.epi_tile).launch(grid=(1,1,1),block=[self.threads_per_cta,1,1],stream=stream)
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@cute.kernel
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def _kernel(self, qk_mma, pv_mma, tma_q, mQ, tma_k, mK, tma_v, mV, tma_c, mC, cl_vmnk, a_smem_s, b_smem_s, v_smem_s, p_tmem_s, c_smem_s, epi_tile):
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warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx())
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tidx,_,_ = cute.arch.thread_idx()
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if warp_idx == self.tma_warp_id:
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cpasync.prefetch_descriptor(tma_q); cpasync.prefetch_descriptor(tma_k)
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cpasync.prefetch_descriptor(tma_v); cpasync.prefetch_descriptor(tma_c)
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@cute.struct
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class SS:
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ab_bar: cute.struct.MemRange[cutlass.Int64, self.num_ab_stage*2]
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mma_si_bar: cute.struct.MemRange[cutlass.Int64, 2]
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acc_bar: cute.struct.MemRange[cutlass.Int64, self.num_acc_stage*2]
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tmem_dealloc: cutlass.Int64; holding: cutlass.Int32
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smem = utils.SmemAllocator(); st = smem.allocate(SS)
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ab_p,ab_c = pipeline.PipelineTmaUmma.create(barrier_storage=st.ab_bar.data_ptr(),num_stages=self.num_ab_stage,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,1),tx_count=self.num_tma_load_bytes,cta_layout_vmnk=cl_vmnk,defer_sync=True).make_participants()
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mma_si_prod,mma_si_cons = pipeline.PipelineUmmaAsync.create(barrier_storage=st.mma_si_bar.data_ptr(),num_stages=1,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,32*len(self.epilogue_warp_id))).make_participants()
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acc_pipe = pipeline.PipelineUmmaAsync.create(barrier_storage=st.acc_bar.data_ptr(),num_stages=self.num_acc_stage,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,len(self.epilogue_warp_id)),cta_layout_vmnk=cl_vmnk,defer_sync=True)
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tmem_bar = pipeline.NamedBarrier(barrier_id=2,num_threads=32*len((self.mma_warp_id,*self.epilogue_warp_id)))
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tmem = utils.TmemAllocator(st.holding.ptr,barrier_for_retrieve=tmem_bar,allocator_warp_id=self.epilogue_warp_id[0],is_two_cta=cute.size(qk_mma.thr_id.shape)==2,two_cta_tmem_dealloc_mbar_ptr=st.tmem_dealloc.ptr)
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pipeline.pipeline_init_arrive(cluster_shape_mn=cl_vmnk,is_relaxed=True)
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sQ = smem.allocate_tensor(element_type=self.q_dtype,layout=a_smem_s.outer,byte_alignment=128,swizzle=a_smem_s.inner)
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sK = smem.allocate_tensor(element_type=self.q_dtype,layout=b_smem_s.outer,byte_alignment=128,swizzle=b_smem_s.inner)
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sV = smem.allocate_tensor(element_type=self.q_dtype,layout=v_smem_s.outer,byte_alignment=128,swizzle=v_smem_s.inner)
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sC = smem.allocate_tensor(element_type=self.o_dtype,layout=c_smem_s.outer,byte_alignment=128,swizzle=c_smem_s.inner)
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gQ = cute.local_tile(mQ,cute.slice_(self.qk_mma_tiler,(None,0,None)),(None,None,None))
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gK = cute.local_tile(mK,cute.slice_(self.qk_mma_tiler,(0,None,None)),(None,None,None))
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gV = cute.local_tile(mV,cute.slice_(self.pv_mma_tiler,(0,None,None)),(None,None,None))
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gC = cute.local_tile(mC,cute.slice_(self.pv_mma_tiler,(None,None,0)),(None,None,None))
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k_cnt = cute.size(gQ, mode=[3])
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qk_thr = qk_mma.get_slice(0); pv_thr = pv_mma.get_slice(0)
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tCgQ = qk_thr.partition_A(gQ); tCgK = qk_thr.partition_B(gK)
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tCgV = pv_thr.partition_B(gV); tCgC = pv_thr.partition_C(gC)
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a_lay = cute.make_layout(cute.slice_(cl_vmnk,(0,0,None,0)).shape)
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tAsQ,tAgQ = cpasync.tma_partition(tma_q,0,a_lay,cute.group_modes(sQ,0,3),cute.group_modes(tCgQ,0,3))
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b_lay = cute.make_layout(cute.slice_(cl_vmnk,(0,None,0,0)).shape)
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tBsK,tBgK = cpasync.tma_partition(tma_k,0,b_lay,cute.group_modes(sK,0,3),cute.group_modes(tCgK,0,3))
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tVsV,tVgV = cpasync.tma_partition(tma_v,0,b_lay,cute.group_modes(sV,0,3),cute.group_modes(tCgV,0,3))
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tAgQ = tAgQ[(None,0,None,0)]; tBgK = tBgK[(None,0,None,0)]; tVgV = tVgV[(None,0,None,0)]
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tCrQ = qk_mma.make_fragment_A(sQ); tCrK = qk_mma.make_fragment_B(sK)
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tCrV = pv_mma.make_fragment_B(sV)
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qk_as = qk_thr.partition_shape_C(self.qk_mma_tiler[:2])
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tStS = qk_thr.make_fragment_C(qk_as)
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tStS0 = cute.make_tensor(tStS.iterator+self.tmem_s0_offset,tStS.layout)
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pv_as = pv_thr.partition_shape_C(self.pv_mma_tiler[:2])
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tOtO = pv_thr.make_fragment_C(pv_as)
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tOtO0 = cute.make_tensor(tOtO.iterator+self.tmem_o0_offset,tOtO.layout)
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# PV reads from S offset (no separate P, no softmax)
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tP = cute.make_tensor(tStS.iterator, p_tmem_s.outer)
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tOrP_base = pv_thr.make_fragment_A(tP)
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tOrP = tOrP_base[(None,None,None,0)]
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tOrP0 = cute.make_tensor(
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tOrP.iterator + self.qk_acc_dtype.width // self.q_dtype.width * self.tmem_p0_offset,
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tOrP.layout) # reads from S offset = 0
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tCtS_fake = qk_mma.make_fragment_C(cute.append(qk_as, self.num_acc_stage))
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tCtO_fake = pv_mma.make_fragment_C(cute.append(pv_as, self.num_acc_stage))
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pipeline.pipeline_init_wait(cluster_shape_mn=cl_vmnk)
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# TMA LOAD
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if warp_idx == self.tma_warp_id:
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ab_p.reset(); peek = ab_p.try_acquire()
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for kt in cutlass.range(k_cnt,unroll=1):
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h = ab_p.acquire_and_advance(peek)
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cute.copy(tma_q,tAgQ[(None,h.count)],tAsQ[(None,h.index)],tma_bar_ptr=h.barrier)
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cute.copy(tma_k,tBgK[(None,h.count)],tBsK[(None,h.index)],tma_bar_ptr=h.barrier)
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cute.copy(tma_v,tVgV[(None,h.count)],tVsV[(None,h.index)],tma_bar_ptr=h.barrier)
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peek = cutlass.Boolean(1)
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if h.count+1<k_cnt: peek = ab_p.try_acquire()
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ab_p.tail()
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# MMA — QK then PV, no softmax, PV reads S directly
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if warp_idx == self.mma_warp_id:
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tmem.wait_for_alloc()
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ab_c.reset(); peek = ab_c.try_wait()
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s0_handle = mma_si_prod.acquire_and_advance()
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acc_st = pipeline.make_pipeline_state(pipeline.PipelineUserType.Producer,self.num_acc_stage)
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acc_pipe.producer_acquire(acc_st)
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# QK
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qk_mma.set(tcgen05.Field.ACCUMULATE, False)
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for kt in range(k_cnt):
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h = ab_c.wait_and_advance(peek)
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for kb in cutlass.range(cute.size(tCrQ,mode=[2]),unroll_full=True):
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cute.gemm(qk_mma,tStS0,tCrQ[(None,None,kb,h.index)],tCrK[(None,None,kb,h.index)],tStS0)
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qk_mma.set(tcgen05.Field.ACCUMULATE, True)
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h.release(); peek = cutlass.Boolean(1)
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if h.count+1<k_cnt: peek = ab_c.try_wait()
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cute.arch.fence_view_async_tmem_store(); s0_handle.commit()
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# No softmax — just signal epilogue to proceed
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s0_handle = mma_si_prod.acquire_and_advance()
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# PV — reads S directly from tmem_s0_offset as P
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pv_mma.set(tcgen05.Field.ACCUMULATE, False)
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tCrV_s = tCrV[(None,None,None,0)]
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for kb in cutlass.range(cute.size(tOrP0,mode=[2]),unroll_full=True):
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cute.gemm(pv_mma,tOtO0,tOrP0[(None,None,kb)],tCrV_s[(None,None,kb)],tOtO0)
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pv_mma.set(tcgen05.Field.ACCUMULATE, True)
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acc_pipe.producer_commit(acc_st); acc_st.advance(); acc_pipe.producer_tail(acc_st)
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# EPILOGUE — no softmax, just drain the si pipeline and do epilogue
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if warp_idx < self.mma_warp_id:
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tmem.allocate(self.num_tmem_alloc_cols)
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tmem.wait_for_alloc()
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tmem_ptr = tmem.retrieve_ptr(self.qk_acc_dtype)
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# Drain the si pipeline (no actual softmax work)
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si_handle = mma_si_cons.wait_and_advance()
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si_handle.release()
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tCtO_base = cute.make_tensor(tmem_ptr + self.tmem_o0_offset, tCtO_fake.layout)
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acc_cons_st = pipeline.make_pipeline_state(pipeline.PipelineUserType.Consumer, self.num_acc_stage)
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c_grp = pipeline.CooperativeGroup(pipeline.Agent.Thread, 32 * len(self.epilogue_warp_id))
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c_pipe = pipeline.PipelineTmaStore.create(num_stages=self.num_c_stage, producer_group=c_grp)
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acc_cons_st = utils.gemm.sm100.epilogue_tma_store(self, tidx, warp_idx, tma_c, tCtO_base, sC, tCgC, epi_tile, 0, const_expr(lambda x: x), (0,0,0), acc_cons_st, acc_pipe, c_pipe)
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c_pipe.producer_tail()
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tmem.relinquish_alloc_permit()
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tmem.free(tmem_ptr)
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def test():
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torch.manual_seed(42)
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m, n, hd = 128, 128, HEAD_DIM
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q = torch.randn(m, hd, 1, dtype=torch.bfloat16, device='cuda')
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k = torch.randn(n, hd, 1, dtype=torch.bfloat16, device='cuda')
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v = torch.ones(n, hd, dtype=torch.bfloat16, device='cuda')
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v = v.as_strided((n, hd), (1, n)).unsqueeze(-1)
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c = torch.zeros(m, hd, 1, dtype=torch.bfloat16, device='cuda')
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qf = q[:,:,0].float(); kf = k[:,:,0].float()
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# No softmax: O = S_fp32_as_bf16 @ V (treating FP32 S as BF16 pairs for P)
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# This is a correctness test for the P/A alias, not a useful computation
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ref = (qf @ kf.T).bfloat16().float() @ v[:,:,0].float()
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mQ = ct.from_dlpack(q).mark_layout_dynamic(leading_dim=ct.get_leading_dim(q))
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mK = ct.from_dlpack(k).mark_layout_dynamic(leading_dim=ct.get_leading_dim(k))
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mV = ct.from_dlpack(v).mark_layout_dynamic(leading_dim=ct.get_leading_dim(v))
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mC = ct.from_dlpack(c).mark_layout_dynamic(leading_dim=ct.get_leading_dim(c))
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stream = cuda.CUstream(torch.cuda.current_stream().cuda_stream)
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kernel = Pv64NoSoftmax()
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print('Compiling...', flush=True)
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compiled = cute.compile(kernel, mQ, mK, mV, mC, stream)
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print(f'tmem_offsets: s0={kernel.tmem_s0_offset} p0={kernel.tmem_p0_offset} o0={kernel.tmem_o0_offset}', flush=True)
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compiled(mQ, mK, mV, mC, stream)
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torch.cuda.synchronize()
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out = c[:,:,0].float()
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# PV reads FP32 S as BF16 P — this is NOT numerically meaningful
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# but if the alias works, we should get NON-ZERO output
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nonzero = (out != 0).sum().item()
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print(f'PV64 no-softmax: nonzero={nonzero}/{out.numel()} out[0,:4]={out[0,:4].tolist()}')
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if nonzero > 0:
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print('P/A alias works for (128,64) — PV reads non-zero data from TMEM')
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else:
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print('P/A alias BROKEN for (128,64) — PV reads all zeros from TMEM')
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if __name__ == '__main__':
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test()
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