246 lines
10 KiB
Plaintext
246 lines
10 KiB
Plaintext
/**
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* Full FMHA HD=16, SK=128 — with PV GEMM via tcgen05.mma TS
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*
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* Pipeline: Q×K^T (SS) → softmax (TMEM) → P×V (TS) → epilogue
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*
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* Key design:
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* - TMEM: 256 columns. Cols 0-127 = S/P. Cols 128-143 = O.
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* - QK: SS MMA (1 K-tile at HD=16)
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* - Softmax: read S from TMEM, compute P, write P back to TMEM
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* - PV: TS MMA, 8 K-tiles (SK=128 → SK/16 = 8 K-tiles)
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* - Epilogue: read O from TMEM, apply MMA scale (2×), write to GMEM
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*/
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#include <cuda_runtime.h>
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#include <cstdio>
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#include <cmath>
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#include <cstdlib>
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#include <cstring>
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#include "dsv4/kernels/attention/fmha_common.cuh"
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#include "dsv4/kernels/attention/fmha_umma_desc.cuh"
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using namespace dsv4::kernels::attention;
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static bf16_t f32_to_bf16_host(float f) { uint32_t u; memcpy(&u,&f,4); return (uint16_t)(u>>16); }
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static float bf16_to_f32_host(bf16_t h) { uint32_t u=(uint32_t)h<<16; float f; memcpy(&f,&u,4); return f; }
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constexpr int HD = 16, SK = 128, BLOCK_MN = 128;
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constexpr int NKT_QK = HD / MMA_K_BF16; // 1 K-tile for QK at HD=16
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constexpr int NKT_PV = SK / MMA_K_BF16; // 8 K-tiles for PV at SK=128
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constexpr int TMEM_P = 128;
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constexpr int TMEM_O = 32; // 16 cols → round to 32 (power of 2, min 32)
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constexpr int TMEM_N = 256;
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constexpr int TILE_SZ = BLOCK_MN * MMA_K_BF16; // 2048 BF16 per K-tile
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__global__ void __launch_bounds__(128)
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test_fmha_ts_full(const bf16_t* __restrict__ q, const bf16_t* __restrict__ k,
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const bf16_t* __restrict__ v, bf16_t* __restrict__ o_out,
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float* __restrict__ o_scalar, float scale)
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{
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const int tid = threadIdx.x, wid = tid / 32, lane = tid % 32;
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// SMEM: tmem_base + sQ(128,16) + sK(128,16) + sV(8 × 16×16)
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extern __shared__ char sbuf[];
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uint32_t* sTmemBase = (uint32_t*)sbuf;
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bf16_t* sQ0 = (bf16_t*)(((uintptr_t)(sbuf + 4) + 15) & ~(uintptr_t)15);
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bf16_t* sK0 = sQ0 + TILE_SZ; // 2048 BF16 per K-tile
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bf16_t* sV = (bf16_t*)(((uintptr_t)(sK0 + TILE_SZ) + 127) & ~(uintptr_t)127);
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// Load Q: (1, HD) → (128, 16) canonical
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write_q_to_smem<HD>(sQ0, q);
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// Load K: (SK, HD) → (128, 16) canonical
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write_k_to_smem<SK, HD>(sK0, k);
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// Load V: (HD, SK) → 8 K-tiles of (16, 16) canonical
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// For PV: B = (SK, HD) = (128, 16). The kt-th K-tile: B[16*kt..16*kt+16, 0..16)
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// B[r, d] = V[d, r] = V[d * SK + r]
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for (int kt = 0; kt < NKT_PV; kt++) {
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bf16_t* sv = sV + kt * 256; // 256 BF16 = 512 bytes per (16,16) tile
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for (int i = tid; i < 256; i += 128) sv[i] = 0;
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for (int d = tid; d < HD; d += 128) {
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for (int lr = 0; lr < MMA_K_BF16; lr++) {
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int r = kt * MMA_K_BF16 + lr;
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int ck = d / 8, lc = d % 8;
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int tmn = lr / 8, llr = lr % 8;
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int dst_idx = ck * 2 * 64 + tmn * 64 + llr * 8 + lc;
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sv[dst_idx] = v[d * SK + r];
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}
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}
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}
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__syncthreads();
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// TMEM alloc
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if (wid == 1) tmem_alloc(__cvta_generic_to_shared(sTmemBase), TMEM_N);
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__syncthreads();
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uint32_t tb = *sTmemBase;
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uint32_t tb_o = tb + TMEM_P; // O at column 128
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// ===== STEP 1: QK GEMM (SS) =====
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{
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uint64_t dq = make_umma_desc_kmajor_none(__cvta_generic_to_shared(sQ0), BLOCK_MN);
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uint64_t dk = make_umma_desc_kmajor_none(__cvta_generic_to_shared(sK0), BLOCK_MN);
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uint32_t idesc_qk = make_idesc(BLOCK_MN, BLOCK_MN);
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for (int kt = 0; kt < NKT_QK; kt++) {
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if (tid == 0) umma_ss_f16(tb, dq, dk, idesc_qk, kt > 0);
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asm volatile("tcgen05.fence::after_thread_sync;" ::: "memory");
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__syncthreads();
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}
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}
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asm volatile("tcgen05.fence::after_thread_sync;" ::: "memory");
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__syncthreads();
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// ===== STEP 2: Softmax =====
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if (wid == 0) {
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float s_vals[SK], row_max = -INFINITY;
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for (int n = 0; n < SK / 8; n++) {
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float tmp[8];
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asm volatile("tcgen05.ld.sync.aligned.32x32b.x8.b32 {%0,%1,%2,%3,%4,%5,%6,%7},[%8];"
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: "=f"(tmp[0]),"=f"(tmp[1]),"=f"(tmp[2]),"=f"(tmp[3]),
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"=f"(tmp[4]),"=f"(tmp[5]),"=f"(tmp[6]),"=f"(tmp[7])
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: "r"(tb + n*8));
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asm volatile("tcgen05.wait::ld.sync.aligned;");
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if (lane == 0) for (int c=0;c<8;c++) {
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s_vals[n*8+c] = tmp[c] * scale;
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row_max = fmaxf(row_max, tmp[c] * scale);
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}
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}
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row_max = wmax(row_max);
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float row_sum = 0.0f;
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if (lane == 0) for (int j=0;j<SK;j++) {
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s_vals[j] = expf(s_vals[j] - row_max);
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row_sum += s_vals[j];
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}
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row_sum = wsum(row_sum);
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if (lane == 0) for (int j=0;j<SK;j++) s_vals[j] /= row_sum;
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// Write P to TMEM
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for (int n = 0; n < SK / 8; n++) {
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float p0=(lane==0)?s_vals[n*8+0]:0, p1=(lane==0)?s_vals[n*8+1]:0;
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float p2=(lane==0)?s_vals[n*8+2]:0, p3=(lane==0)?s_vals[n*8+3]:0;
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float p4=(lane==0)?s_vals[n*8+4]:0, p5=(lane==0)?s_vals[n*8+5]:0;
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float p6=(lane==0)?s_vals[n*8+6]:0, p7=(lane==0)?s_vals[n*8+7]:0;
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asm volatile("tcgen05.st.sync.aligned.32x32b.x8.b32 [%0],{%1,%2,%3,%4,%5,%6,%7,%8};"
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:: "r"(tb+n*8),
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"f"(p0),"f"(p1),"f"(p2),"f"(p3),"f"(p4),"f"(p5),"f"(p6),"f"(p7));
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}
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tmem_fence_store();
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}
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__syncthreads();
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// ===== STEP 3: PV GEMM (TS) =====
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// P(128,128) × V(128,16) → O(128,16)
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// 8 K-tiles: A = P cols [16*kt..16*kt+15), B = V K-tile kt
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{
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uint32_t idesc_pv = make_idesc(BLOCK_MN, HD);
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for (int kt = 0; kt < NKT_PV; kt++) {
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uint32_t tmem_a = tb + kt * MMA_K_BF16; // A from P's kt-th 16 columns
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bf16_t* sv = sV + kt * 256;
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uint64_t dv = make_umma_desc_kmajor_none(__cvta_generic_to_shared(sv), 16);
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bool accumulate = (kt > 0);
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if (tid == 0) umma_ts_f16(tb_o, tmem_a, dv, idesc_pv, accumulate);
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asm volatile("tcgen05.fence::after_thread_sync;" ::: "memory");
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__syncthreads();
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}
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}
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asm volatile("tcgen05.fence::after_thread_sync;" ::: "memory");
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__syncthreads();
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// ===== STEP 4: Epilogue — read O from TMEM =====
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// MMA output is scaled by 0.5, so multiply by 2.0
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if (wid == 0) {
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float o_vals[HD];
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for (int n = 0; n < HD / 8; n++) {
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float tmp[8];
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asm volatile("tcgen05.ld.sync.aligned.32x32b.x8.b32 {%0,%1,%2,%3,%4,%5,%6,%7},[%8];"
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: "=f"(tmp[0]),"=f"(tmp[1]),"=f"(tmp[2]),"=f"(tmp[3]),
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"=f"(tmp[4]),"=f"(tmp[5]),"=f"(tmp[6]),"=f"(tmp[7])
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: "r"(tb_o + n*8));
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asm volatile("tcgen05.wait::ld.sync.aligned;");
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if (lane == 0) for (int c=0;c<8;c++) o_vals[n*8+c] = tmp[c] * 2.0f;
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}
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if (lane == 0) for (int d=0;d<HD;d++) o_out[d] = f32_to_bf16(o_vals[d]);
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}
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__syncthreads();
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// Scalar reference (on GPU, tid==0)
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if (tid == 0) {
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float s[SK];
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for (int j=0;j<SK;j++) {
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float dot = 0.0f;
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for (int d=0;d<HD;d++) dot += bf16_to_f32(q[d]) * bf16_to_f32(k[j*HD+d]);
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s[j] = dot * scale;
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}
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float mx = -INFINITY;
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for (int j=0;j<SK;j++) mx = fmaxf(mx, s[j]);
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float sm = 0.0f;
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for (int j=0;j<SK;j++) { s[j] = expf(s[j]-mx); sm += s[j]; }
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for (int j=0;j<SK;j++) s[j] /= sm;
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for (int d=0;d<HD;d++) {
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float ov = 0.0f;
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for (int j=0;j<SK;j++) ov += s[j] * bf16_to_f32(v[d*SK+j]);
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o_scalar[d] = ov;
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}
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}
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if (wid == 0) tmem_dealloc(tb, TMEM_N);
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}
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int main() {
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printf("=== Full FMHA HD=16 with PV GEMM (TS) ===\n");
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const float SCALE = 1.0f / sqrtf((float)HD);
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bf16_t* h_q = (bf16_t*)malloc(HD*sizeof(bf16_t));
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bf16_t* h_k = (bf16_t*)malloc(SK*HD*sizeof(bf16_t));
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bf16_t* h_v = (bf16_t*)malloc(HD*SK*sizeof(bf16_t));
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bf16_t* h_o = (bf16_t*)calloc(HD, sizeof(bf16_t));
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float* h_o_scalar = (float*)calloc(HD, sizeof(float));
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srand(42);
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for (int d=0;d<HD;d++) h_q[d] = f32_to_bf16_host((float)(rand()%100)/100.0f-0.5f);
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for (int i=0;i<SK*HD;i++) h_k[i] = f32_to_bf16_host((float)(rand()%100)/100.0f-0.5f);
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for (int i=0;i<HD*SK;i++) h_v[i] = f32_to_bf16_host((float)(rand()%100)/100.0f-0.5f);
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bf16_t *d_q,*d_k,*d_v,*d_o; float *d_o_scalar;
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cudaMalloc(&d_q, HD*sizeof(bf16_t));
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cudaMalloc(&d_k, SK*HD*sizeof(bf16_t));
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cudaMalloc(&d_v, HD*SK*sizeof(bf16_t));
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cudaMalloc(&d_o, HD*sizeof(bf16_t));
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cudaMalloc(&d_o_scalar, HD*sizeof(float));
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cudaMemcpy(d_q, h_q, HD*sizeof(bf16_t), cudaMemcpyHostToDevice);
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cudaMemcpy(d_k, h_k, SK*HD*sizeof(bf16_t), cudaMemcpyHostToDevice);
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cudaMemcpy(d_v, h_v, HD*SK*sizeof(bf16_t), cudaMemcpyHostToDevice);
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// SMEM: all sizes in BYTES
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// tmem_base(4) + pad(12) + sQ(TILE_SZ*2) + sK(TILE_SZ*2) + sV(NKT_PV*256*2) + extra + align
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int smem = (4+16 + TILE_SZ*2 + TILE_SZ*2 + NKT_PV*256*2 + 256 + 127) & ~127;
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test_fmha_ts_full<<<1, 128, smem>>>(d_q, d_k, d_v, d_o, d_o_scalar, SCALE);
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cudaError_t err = cudaDeviceSynchronize();
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if (err != cudaSuccess) { printf("CUDA ERROR: %s\n", cudaGetErrorString(err)); return 1; }
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cudaMemcpy(h_o, d_o, HD*sizeof(bf16_t), cudaMemcpyDeviceToHost);
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cudaMemcpy(h_o_scalar, d_o_scalar, HD*sizeof(float), cudaMemcpyDeviceToHost);
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printf("O[0..15] MMA: "); for(int d=0;d<HD;d++) printf("%.6f ",bf16_to_f32_host(h_o[d])); printf("\n");
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printf("O[0..15] ref: "); for(int d=0;d<HD;d++) printf("%.6f ",h_o_scalar[d]); printf("\n");
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float max_diff=0, max_val=0;
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for (int d=0;d<HD;d++) {
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max_diff = fmaxf(max_diff, fabsf(bf16_to_f32_host(h_o[d]) - h_o_scalar[d]));
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max_val = fmaxf(max_val, fabsf(h_o_scalar[d]));
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}
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float rel_err = max_val>0 ? max_diff/max_val : max_diff;
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float cos_sim=0,na=0,nb=0;
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for (int d=0;d<HD;d++) { float a=bf16_to_f32_host(h_o[d]),b=h_o_scalar[d]; cos_sim+=a*b; na+=a*a; nb+=b*b; }
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cos_sim /= (sqrtf(na)*sqrtf(nb)+1e-10f);
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printf("Max rel err: %.8f | cosine: %.8f\n", rel_err, cos_sim);
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printf("Test %s\n", cos_sim > 0.999f ? "PASSED" : "FAILED");
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cudaFree(d_q); cudaFree(d_k); cudaFree(d_v); cudaFree(d_o); cudaFree(d_o_scalar);
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free(h_q); free(h_k); free(h_v); free(h_o); free(h_o_scalar);
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return cos_sim > 0.999f ? 0 : 1;
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}
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