biondizzle
5290c91c35
The warp shuffle approach failed because __shfl_down_sync with 16 threads has undefined behavior for the odd nibble. Use the same pattern as the working deinterleave_quantize.cu: 1 CTA per 16-element block, 16 threads per CTA, each thread reads all 16 elements sequentially and computes amax + quantize + pack.
107 lines
3.4 KiB
Plaintext
107 lines
3.4 KiB
Plaintext
#include <cuda.h>
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#include <cuda_runtime.h>
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#include <cuda_fp8.h>
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#include <cuda_fp8.hpp>
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#include <ATen/ATen.h>
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#include <torch/extension.h>
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#include <cstdint>
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// BF16 → NVFP4 quantization kernel (no deinterleave, GPU-only).
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// Reads BF16 from GMEM, quantizes to NVFP4 (FP4 data + FP8 E4M3 scales),
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// writes both to GMEM. No CPU-GPU syncs.
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//
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// This replaces quantize_activation_nvfp4() which uses .amax() (CPU sync).
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// Global scale is passed in as a pre-computed scalar.
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//
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// Grid: (N / 16, M, 1) — each CTA processes one 16-element block in one row.
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// Block: 16 threads (1 thread per element, warp amax reduction).
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//
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// Same proven pattern as deinterleave_quantize.cu.
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__device__ __forceinline__ int half_step_to_e2m1(int hs) {
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if (hs <= 4) return hs;
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if (hs <= 5) return 4;
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if (hs <= 7) return 5;
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if (hs <= 10) return 6;
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return 7;
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}
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__global__ void quantize_nvfp4_kernel(
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const __nv_bfloat16* __restrict__ input,
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int M, int N,
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float global_scale,
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uint8_t* __restrict__ out_fp4,
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uint8_t* __restrict__ out_sf
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) {
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int m = blockIdx.y;
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int n_block = blockIdx.x;
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if (m >= M || n_block * 16 >= N) return;
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float vals[16];
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float block_amax = 0.0f;
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// Step 1: Read 16 BF16 elements and compute amax
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for (int i = 0; i < 16; i++) {
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int col = n_block * 16 + i;
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if (col < N) {
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vals[i] = __bfloat162float(input[m * N + col]) / global_scale;
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} else {
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vals[i] = 0;
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}
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block_amax = fmaxf(block_amax, fabsf(vals[i]));
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}
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// Step 2: Compute FP8 E4M3 block scale
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float bsf = block_amax / 6.0f;
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if (block_amax < 6.0f * 0.001953125f) {
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bsf = 0;
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for (int i = 0; i < 16; i++) vals[i] = 0;
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}
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__nv_fp8_e4m3 bsf8_obj(bsf);
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float bs = (float)bsf8_obj;
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uint8_t bsf8 = *(uint8_t*)&bsf8_obj;
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// Step 3: Quantize each value to FP4 E2M1
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uint8_t nibbles[16];
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for (int i = 0; i < 16; i++) {
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if (bs < 1e-8f) { nibbles[i] = 0; continue; }
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float s = vals[i] / bs;
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int hs = __float2int_rn(fminf(fabsf(s), 6.0f) * 2.0f);
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if (hs > 12) hs = 12;
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int idx = half_step_to_e2m1(hs);
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if (s < 0) idx += 8;
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nibbles[i] = idx;
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}
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// Step 4: Pack pairs: (nibbles[1] << 4) | nibbles[0], etc.
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for (int i = 0; i < 8; i++)
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out_fp4[m * (N / 2) + n_block * 8 + i] = (nibbles[2*i+1] << 4) | nibbles[2*i];
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// Step 5: Write FP8 block scale
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out_sf[m * (N / 16) + n_block] = bsf8;
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}
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std::tuple<torch::Tensor, torch::Tensor> quantize_nvfp4_cuda(
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torch::Tensor input_bf16, double global_scale
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) {
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int M = input_bf16.size(0);
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int N = input_bf16.size(1);
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TORCH_CHECK(N % 16 == 0, "N must be a multiple of 16 for NVFP4 quantization");
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auto opts = input_bf16.options();
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auto out_fp4 = torch::zeros({M, N / 2}, opts.dtype(torch::kUInt8));
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auto out_sf = torch::zeros({M, N / 16}, opts.dtype(torch::kUInt8));
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int nb = N / 16;
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dim3 grid(nb, M);
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dim3 block(16);
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quantize_nvfp4_kernel<<<grid, block>>>(
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reinterpret_cast<const __nv_bfloat16*>(input_bf16.data_ptr<at::BFloat16>()),
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M, N, (float)global_scale,
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out_fp4.data_ptr<uint8_t>(), out_sf.data_ptr<uint8_t>()
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);
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return {out_fp4.view(torch::kFloat4_e2m1fn_x2), out_sf.view(torch::kFloat8_e4m3fn)};
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}
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("quantize_nvfp4", &quantize_nvfp4_cuda);
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}
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