biondizzle df6220abaf E5: Fold batch loop into native kernel grid (blockIdx.z) ...

The 6-warp multi-tile kernel already supports batch natively via
dim3 grid(1, n_h, batch). Removed Python for-loop for 4D input.
Single kernel launch per layer for batched decode instead of
batch_size launches.

T>1 prefill still uses per-batch dispatch (E8 future work).

2026-05-30 21:21:02 +00:00

..

attention

E5: Fold batch loop into native kernel grid (blockIdx.z)

2026-05-30 21:21:02 +00:00

cache

fix: correct gather.py kernel_dir path

2026-05-30 21:12:09 +00:00

compressor

Wire indexer compute_index_scores_topk + fix compressor imports

2026-05-30 21:19:06 +00:00

cuda

fix: extern declarations for gather_swa functions in gather_kv.cu

2026-05-30 21:14:15 +00:00

gemm

NVFP4-1.1: Mark fp4_quant.py as toolchain-blocked, clean up test files

2026-05-28 04:59:01 +00:00

indexer

Wire indexer compute_index_scores_topk + fix compressor imports

2026-05-30 21:19:06 +00:00

router

Router: Blackwell-native fused decode kernel — real CuTeDSL implementation

2026-05-21 22:04:20 +00:00

__init__.py

Restructure: cutedsl/ -> dsv4/ with proper layering

2026-05-21 17:30:44 +00:00