156 lines
6.0 KiB
Plaintext
156 lines
6.0 KiB
Plaintext
/**
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* Test PV GEMM only: feed known P values, load V directly, verify output.
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* Uses the same 4-warp pattern as test_fmha_gen.cu.
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* Skips QK and softmax entirely — just PV → O.
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*/
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#include <cuda_runtime.h>
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#include <cuda.h>
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#include <cstdio>
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#include <cmath>
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#include <cstdlib>
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#include <cstring>
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#ifndef HD_VAL
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#define HD_VAL 64
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#endif
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#include "dsv4/kernels/attention/fmha_common.cuh"
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#include "dsv4/kernels/attention/fmha_umma_desc.cuh"
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using namespace dsv4::kernels::attention;
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static bf16_t f32_to_bf16_host(float f) { uint32_t u; memcpy(&u,&f,4); return (uint16_t)(u>>16); }
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static float bf16_to_f32_host(bf16_t h) { uint32_t u=(uint32_t)h<<16; float f; memcpy(&f,&u,4); return f; }
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constexpr int HD = HD_VAL;
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constexpr int SK = 128;
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constexpr int BLOCK_MN = 128;
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constexpr int MMA_K = MMA_K_BF16;
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constexpr int NKT_PV = SK / MMA_K;
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constexpr int N_NSUB = HD / 16;
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constexpr int TILE_SZ = BLOCK_MN * MMA_K;
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constexpr int TMEM_N = (HD <= 128) ? 128 : 256;
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constexpr int V_SUB_SZ = 256; // (16,16) canonical
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constexpr int CORES_MN = 16;
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constexpr int CORES_MN_V = 2;
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__global__ void __launch_bounds__(128)
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test_pv_only_kernel(
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float* __restrict__ out, // (HD,) — PV output
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const bf16_t* __restrict__ v, // (HD, SK)
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const float* __restrict__ p_input // (SK,) — pre-computed P values
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) {
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const int tid = threadIdx.x, wid = tid / 32, lane = tid % 32;
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extern __shared__ __align__(128) char sbuf[];
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size_t off = 0;
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uint32_t* sTmemBase = (uint32_t*)(sbuf + off); off = 4;
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off = (off + 15) & ~(size_t)15;
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float* s_p_vals = (float*)(sbuf + off); off += SK * sizeof(float);
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off = (off + 15) & ~(size_t)15;
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bf16_t* sPk = (bf16_t*)(sbuf + off); off += TILE_SZ * sizeof(bf16_t);
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off = (off + 127) & ~(size_t)127;
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bf16_t* sV = (bf16_t*)(sbuf + off); off += V_SUB_SZ * sizeof(bf16_t);
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// Load P values into SMEM
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for (int j = tid; j < SK; j += 128) s_p_vals[j] = p_input[j];
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__syncthreads();
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// TMEM alloc
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if (wid == 1) tmem_alloc(__cvta_generic_to_shared(sTmemBase), TMEM_N);
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__syncthreads();
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uint32_t tb = *sTmemBase;
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// PV GEMM — EXACT pattern from test_fmha_gen.cu
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{
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uint32_t idesc_pv16 = make_idesc(BLOCK_MN, 16);
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uint64_t dp = make_umma_desc_kmajor_none(__cvta_generic_to_shared(sPk), BLOCK_MN);
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for (int n = 0; n < N_NSUB; n++) {
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int d_base = n * 16;
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for (int kt = 0; kt < NKT_PV; kt++) {
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for (int i = tid; i < TILE_SZ; i += 128) sPk[i] = 0;
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if (tid < 16) {
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int c = tid;
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int ck = c / 8, lc = c % 8;
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sPk[ck * CORES_MN * 64 + 0 * 64 + 0 * 8 + lc] = f32_to_bf16(s_p_vals[kt * MMA_K + c]);
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}
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for (int i = tid; i < V_SUB_SZ; i += 128) sV[i] = 0;
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for (int dd = tid; dd < 16; dd += 128) {
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for (int lr = 0; lr < MMA_K; lr++) {
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int r = kt * MMA_K + lr;
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int g_mn = dd / 8, g_k = lr / 8, llr = dd % 8, lc = lr % 8;
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sV[g_k * CORES_MN_V * 64 + g_mn * 64 + llr * 8 + lc] = v[(d_base + dd) * SK + r];
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}
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}
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__syncthreads();
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uint64_t dv = make_umma_desc_kmajor_none(__cvta_generic_to_shared(sV), 16);
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if (tid == 0) umma_ss_f16(tb + n * 16, dp, dv, idesc_pv16, kt > 0);
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asm volatile("tcgen05.fence::after_thread_sync;" ::: "memory");
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__syncthreads();
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}
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}
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}
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// Read from TMEM
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if (wid == 0) {
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float o_vals[HD];
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for (int n = 0; n < HD / 8; n++) {
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float tmp[8];
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asm volatile("tcgen05.ld.sync.aligned.32x32b.x8.b32 {%0,%1,%2,%3,%4,%5,%6,%7},[%8];"
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: "=f"(tmp[0]),"=f"(tmp[1]),"=f"(tmp[2]),"=f"(tmp[3]),
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"=f"(tmp[4]),"=f"(tmp[5]),"=f"(tmp[6]),"=f"(tmp[7])
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: "r"(tb + n * 8));
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asm volatile("tcgen05.wait::ld.sync.aligned;");
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if (lane == 0) for (int c = 0; c < 8; c++) o_vals[n * 8 + c] = tmp[c];
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}
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if (lane == 0) for (int d = 0; d < HD; d++) out[d] = o_vals[d];
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}
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if (wid == 0) tmem_dealloc(tb, TMEM_N);
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}
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int main() {
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printf("PV-Only Test (HD=%d, SK=%d)\n", (int)HD, (int)SK);
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bf16_t* h_v = (bf16_t*)malloc(HD * SK * sizeof(bf16_t));
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float* h_p = (float*)malloc(SK * sizeof(float));
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srand(42);
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for (int i = 0; i < HD * SK; i++) h_v[i] = f32_to_bf16_host((float)(rand()%100)/100.0f - 0.5f);
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// Simple P: uniform (all 1/SK)
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for (int j = 0; j < SK; j++) h_p[j] = 1.0f / SK;
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bf16_t *d_v; float *d_p, *d_out;
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cudaMalloc(&d_v, HD * SK * sizeof(bf16_t));
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cudaMalloc(&d_p, SK * sizeof(float));
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cudaMalloc(&d_out, HD * sizeof(float));
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cudaMemcpy(d_v, h_v, HD * SK * sizeof(bf16_t), cudaMemcpyHostToDevice);
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cudaMemcpy(d_p, h_p, SK * sizeof(float), cudaMemcpyHostToDevice);
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size_t smem = 4 + 16 + SK*4 + 16 + TILE_SZ*2 + 128 + V_SUB_SZ*2 + 256;
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cudaFuncSetAttribute(test_pv_only_kernel, cudaFuncAttributeMaxDynamicSharedMemorySize, smem);
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test_pv_only_kernel<<<1, 128, smem>>>(d_out, d_v, d_p);
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cudaError_t err = cudaDeviceSynchronize();
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if (err != cudaSuccess) { printf("CUDA ERROR: %s\n", cudaGetErrorString(err)); return 1; }
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float* h_out = (float*)malloc(HD * sizeof(float));
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cudaMemcpy(h_out, d_out, HD * sizeof(float), cudaMemcpyDeviceToHost);
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// Reference: O = P @ V where P = 1/SK, so O[d] = (1/SK) * sum_j V[d,j]
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int fail = 0; float max_rel = 0;
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for (int d = 0; d < HD; d++) {
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float ref = 0.0f;
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for (int j = 0; j < SK; j++) ref += bf16_to_f32_host(h_v[d * SK + j]) / SK;
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float got = h_out[d];
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float rel = fabsf(ref) > 1e-4f ? fabsf(got - ref) / fabsf(ref) : fabsf(got - ref);
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if (rel > max_rel) max_rel = rel;
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if (rel > 0.01f && fail < 5) printf(" d=%d: ref=%.6f got=%.6f\n", d, ref, got);
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if (rel > 0.01f) fail++;
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}
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printf("Max rel err: %.8f, failures: %d\n", max_rel, fail);
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printf("%s\n", fail == 0 ? "PASSED" : "FAILED");
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return fail == 0 ? 0 : 1;
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}
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