3 Commits

Author	SHA1	Message	Date
biondizzle	2fcd5f1902	wip: fused SwiGLU Stage 1 - SiLU in registers (full acc_vec) ... Stage 1 of the fused epilogue: applies SiLU (x * sigmoid(x)) to the full accumulator register tensor before writing BF16 to C. This validates that cute.exp and element-wise FP32 operations work on CuTe register tensors in the epilogue. The gate/up pairing is not yet implemented (Stage 2). The fused_swiglu flag is const_expr(0) by default, so the standard epilogue path is unchanged unless the flag is enabled.	2026-05-20 03:07:02 +00:00
biondizzle	9cdf79fd9c	wip: fused SwiGLU kernel scaffold + bridge interleave + plan ... - fused_swiglu_grouped_mm.py: copypaste of torch_scaled_grouped_mm.py with class rename and fused_swiglu/swiglu_limit params added - bridge.py: added interleave_l1_weights, deinterleave_l1_weights, warmup_fused_swiglu_compilation - Pure-PyTorch interleave invariant passes (A@cat vs deinterleave(A@interleave)) - Standalone GEMM interleave test fails due to kernel-internal N-tiling layout (expected, skipping per plan) - FUSED_EPILOGUE_PLAN.md updated with register layout, amax shuffle plan, 4-step implementation strategy	2026-05-20 03:04:38 +00:00
biondizzle	ca28f1335d	refactor: copy CuTeDSL kernel into repo with local imports ... Copied from CUTLASS examples (no more runtime dependency on /root/cutlass/examples/). Fixed all imports to use cutedsl.kernel.* instead of blackwell.kernel.*. Structure: cutedsl/__init__.py cutedsl/kernel/__init__.py cutedsl/kernel/moe/ (the MoE scaled grouped GEMM) cutedsl/kernel/blockscaled_gemm/ (dense blockscaled GEMM) test_cutedsl.py updated to import from our local copy.	2026-05-16 02:57:54 +00:00