biondizzle/nvfp4-megamoe-kernel
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9ea7f511b00e2bd14f22c6f83ea8fc7e75b2a4cf
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180 Commits

Author SHA1 Message Date
biondizzle
9ea7f511b0 fix: dummy tma_p reuse tma_q for non-SMEM-P 2026-05-24 03:33:41 +00:00
biondizzle
5e154770de D1: SMEM-P using make_tiled_copy_C + retile (correct CUTLASS pattern) 2026-05-24 03:32:03 +00:00
biondizzle
0f52c3453c D1: Fix SMEM-P (coordinate store), LSE (FP32), add TMEM-P-only test 2026-05-24 03:27:14 +00:00
biondizzle
52570d94cb D1: Fix SMEM-P - coordinate-indexed store (replaces make_tiled_copy_C) 2026-05-24 03:24:44 +00:00
biondizzle
70c9d93d28 feat: SMEM-P make_tiled_copy_C + zero-fill dest tensor 2026-05-24 03:23:53 +00:00
biondizzle
7cf9704584 feat: SMEM-P using make_tiled_copy_C(qk_mma) approach 2026-05-24 03:22:57 +00:00
biondizzle
fe47a5f882 fix: LSE type mismatch Float32→BFloat16 2026-05-24 03:20:26 +00:00
biondizzle
6313974fba D1.5: Fix SMEM-P - use coordinate-indexed store (same proven pattern) 2026-05-24 03:19:32 +00:00
biondizzle
153db24be2 D1.5: Always output un-normalized O + LSE (epilogue_tma_store only, no TMEM round-trip normalize) 2026-05-24 03:18:38 +00:00
biondizzle
d68ab348bb feat: SMEM-P using make_tiled_copy_A from PV MMA 2026-05-24 03:16:34 +00:00
biondizzle
b4a985631b fix: fence_proxy not fence 2026-05-24 02:45:01 +00:00
biondizzle
228ec3c638 D1.5: Replace broken make_cotiled_copy SMEM-P with coordinate-indexed store 2026-05-24 02:43:42 +00:00
biondizzle
eda7d40df2 Merge branch 'master' of ssh://sweetapi.com:2222/biondizzle/nvfp4-megamoe-kernel 2026-05-24 02:41:39 +00:00
biondizzle
952c25e227 D1.5: Use tCtO_fake layout for epilogue_tma_store (needs STAGE dim) 2026-05-24 02:41:32 +00:00
biondizzle
0a980de7ad feat: SMEM-P using make_cotiled_copy (one-row-per-thread) 2026-05-24 02:41:19 +00:00
biondizzle
85eb2bc4bb D1.5: Remove duplicate tTMrO definition (keep unconditional one) 2026-05-24 02:40:40 +00:00
biondizzle
cd223e1b98 fix: reorder tTMrO definition after tTMEM_LOADcO 2026-05-24 02:36:08 +00:00
biondizzle
54e94d44ef fix: tTMrO scoping + restore SMEM-P coordinate write 2026-05-24 02:34:53 +00:00
biondizzle
6ead708c7d D1.5: Move tTMrO def before softmax loop (CuTeDSL scoping) 2026-05-24 02:32:51 +00:00
biondizzle
5a34865062 debug: zero-fill sP to check deadlock 2026-05-24 02:31:12 +00:00
biondizzle
81652629e3 D1.5: Use proven Stage C approach - normalize via TMEM round-trip + epilogue_tma_store 2026-05-24 02:30:25 +00:00
biondizzle
e50ba7212c test: SMEM-P coordinate verification test 2026-05-24 01:58:32 +00:00
biondizzle
8166898cc3 D1.5: Fix bSG_gC slicing - group trailing modes (CUTLASS pattern) 2026-05-24 01:41:52 +00:00
biondizzle
c7a692b75e D1.5: Dynamic slicing for tTR_gC (variable rest dims) 2026-05-24 01:40:44 +00:00
biondizzle
cb6eae4c4f D1.5: Fix flat_divide slice coordinates (4 modes, no STAGE dim) 2026-05-24 01:39:21 +00:00
biondizzle
d6a607d12e D1.5: Rewrite correction epilogue using CUTLASS pattern (transform_partitioned, flat_divide, paired atoms) 2026-05-24 01:37:53 +00:00
biondizzle
ef9fa86848 D1.5: Fix TMA store - group_modes on bSG_gC, use flat indexing 2026-05-24 01:36:01 +00:00
biondizzle
5a5cd19b81 D1.5: Fix TMA store - use flat_divide on tCgC instead of local_tile on mC 2026-05-24 01:35:10 +00:00
biondizzle
52a5aa61bc D1.5: Fix TMA store - use 3D tile for local_tile on 3D mC 2026-05-24 01:20:33 +00:00
biondizzle
865832f669 D1.5: Use group_modes on sC for 2D TMA view (preserves swizzle) 2026-05-24 00:52:57 +00:00
biondizzle
a8939ced1f D1.5: Use 2D sC_epi layout from c_smem_s for TMA partition 2026-05-24 00:51:18 +00:00
biondizzle
9705b07969 D1.5: Fix TMA store - use group_modes on sC and tCgC 2026-05-24 00:48:18 +00:00
biondizzle
d834836bb7 D1.5: Simplify TMA store - use 2D sC_epi and gC_epi views 2026-05-24 00:46:52 +00:00
biondizzle
c05a171e15 D1.5: Fix TMA store - use existing gC partition 2026-05-24 00:43:35 +00:00
biondizzle
74e1c0420a D1.5: Implement correction epilog with paired atoms (get_tmem_load_op + get_smem_store_op) 
One-way: TMEM → registers (normalize) → SMEM → GMEM
Based on CUTLASS FMHA reference's correction_epilog pattern.
Eliminates TMEM round-trip error for O normalization.
O rescale (kt>0) still uses old atoms (separate fix).
 2026-05-24 00:41:27 +00:00
biondizzle
d96786ec44 D1.5: Add TODO for correction epilog - keeping working TMEM round-trip for now 2026-05-24 00:37:36 +00:00
biondizzle
ae7a1f5e0a D1.5: Revert to pre-epilog backup - correction epilog refactor is complex, will do incrementally 
The correction epilog (TMEM→reg→SMEM→GMEM one-way trip) is the right approach
but the TMA store from SMEM requires proper partitioning that needs more work.
Reverting to the known-working state (with 3% TMEM round-trip error) to focus
on the SMEM-P write first.
 2026-05-24 00:35:00 +00:00
biondizzle
a59d57e4d5 D1.5: Fix TMA store - use local_tile with pv_mma_tiler 2026-05-24 00:32:35 +00:00
biondizzle
a6bf31a22e D1.5: Fix TMA store rank mismatch - use 2D sC_epi view 2026-05-24 00:31:45 +00:00
biondizzle
d316875145 D1.5: Implement correction epilog with get_tmem_load_op + get_smem_store_op paired atoms 
- One-way: TMEM → registers (normalize) → SMEM → GMEM
- Eliminates TMEM round-trip error for O normalization
- O rescale (kt>0) still uses old atoms (fix later)
- Based on CUTLASS FMHA reference's correction_epilog pattern
 2026-05-24 00:30:38 +00:00
biondizzle
8514a72ba0 D1.5: Replace TMEM round-trip normalize with correction epilog (one-way: TMEM→reg→SMEM→GMEM) 
- Remove noop + normalize TMEM round-trips (3% error per trip)
- Use epilogue_tmem_copy_and_partition for TMEM→reg (paired atoms)
- Use epilogue_smem_copy_and_partition for reg→SMEM (paired atoms)
- Apply 1/row_sum normalization in register space (exact)
- TMA store from SMEM→GMEM (no TMEM write-back)
- Add iter_acc_early_release_in_epilogue attribute
- Update SMEM-P comments to reflect coordinate-indexed fallback
 2026-05-24 00:24:24 +00:00
biondizzle
26de7254ad D1.3: Fix LSE tensor layout for weakly congruent store 2026-05-24 00:16:22 +00:00
biondizzle
d092a1743a D1.3: Re-enable coordinate-indexed SMEM-P write with identity tensor coords 2026-05-23 23:26:46 +00:00
biondizzle
a17dca508d D1.3: Revert to zero-fill for sP - need to verify sP→PV pipeline first 2026-05-23 23:26:07 +00:00
biondizzle
5be5d42e94 D1.3: Compute (m,k) directly from thread mapping instead of identity tensor 2026-05-23 23:24:54 +00:00
biondizzle
23964d28c0 D1.3: Add debug prints for SMEM-P coordinate mapping 2026-05-23 23:24:02 +00:00
biondizzle
1e5635b93f D1.3: Add SMEM-P coordinate diagnostic test 2026-05-23 23:23:05 +00:00
biondizzle
e0a11e32f8 D1.3: Fix coord extraction - identity tensor stores (m,k) pairs as values 2026-05-23 23:21:15 +00:00
biondizzle
a7171fa5e1 D1.3: Fix coordinate indexing - tTMEM_LOADcS first mode is (32,1) nested tuple 2026-05-23 23:20:12 +00:00
biondizzle
df7bc40d37 D1.3: Direct coordinate-indexed SMEM-P write using tTMEM_LOADcS coords 
Each softmax thread writes its P values to sP using the (m,k) coordinates
from tTMEM_LOADcS. The k coordinate is decomposed into (k0,k1,k2) to
match sP's ((128,16),1,(4,2)) layout. CuTeDSL tensor indexing handles
the swizzle automatically. No make_tiled_copy needed.
 2026-05-23 23:19:21 +00:00