Commit Graph

407 Commits

Author SHA1 Message Date
b13da6b7a0 diag: add 2-CTA check + fix LayoutEnum in MMA test 2026-05-23 08:45:26 +00:00
c34291843b fix: remove bad import in NVFP4 diag 2026-05-23 08:44:37 +00:00
538dbb0643 fix: use quantize_activation_nvfp4 in diag 2026-05-23 08:39:12 +00:00
e2f599e4af fix: use correct API for NVFP4-0 diag (sf_vec_size + mma_tiler_mn) 2026-05-23 08:38:19 +00:00
5572b74591 fix: use Sm100BlockScaledPersistentDenseGemmKernel in diag 2026-05-23 08:30:43 +00:00
6b1330ba47 fix: use randint+view for FP4/FP8 tensors in diag 2026-05-23 08:29:16 +00:00
3733927f28 fix: NVFP4-0 diag script — import SF_VEC_SIZE from quantize.py 2026-05-23 08:28:13 +00:00
6d8f7db2dd diag: NVFP4-0 primitive verification script 2026-05-23 08:26:56 +00:00
99000cba8d D1.2: fix probe for hd=512 (MMA max N=256, use pv_n_tile) 2026-05-23 06:41:42 +00:00
60824b62db D1.2: simplify TMEM budget probe, fix printf args 2026-05-23 06:40:55 +00:00
de439bcd75 fix: cuda.CUstream import 2026-05-23 06:40:05 +00:00
1c20b826d9 D1.2: TMEM budget probe using @cute.jit for MLIR context 2026-05-23 06:39:27 +00:00
6575e83f6d fix: remove unused v_fmha_layout from probe 2026-05-23 06:38:08 +00:00
07bf2adf51 D1.2: TMEM budget probe with real tensor major modes 2026-05-23 06:37:34 +00:00
6e351c276d fix: OperandMajorMode.MN not .M 2026-05-23 06:36:39 +00:00
cabe8489aa fix: typo + OperandMajorMode for TMEM budget probe 2026-05-23 06:35:55 +00:00
61b9dbb2d6 fix: LayoutEnum import from cutlass.utils 2026-05-23 06:35:03 +00:00
4c35fa49a9 fix import path for tcgen05 2026-05-23 06:34:30 +00:00
a2d0dec7bb D1.2: TMEM budget probe script for hd=64,128,256,512 2026-05-23 06:33:26 +00:00
1be005296c debug: hd=64 with CUDA_LAUNCH_BLOCKING 2026-05-23 03:42:53 +00:00
fe1826b0de D1: test raw unnormalized output via epilogue_tma_store 2026-05-23 03:33:59 +00:00
091cb59be5 test: paired atoms epilog from old commit 6ee28d8 2026-05-23 03:32:53 +00:00
f23d55fd3f D1: paired atoms epilogue (no TMEM round-trip)
Replace NO-OP round-trip + normalize + epilogue_tma_store with:
- get_tmem_load_op + get_smem_store_op paired atoms
- One-way TMEM→reg (normalize) →SMEM→GMEM
- Eliminates ~3% error from TMEM layout mismatch
- O rescale disabled (single KV tile only for now)
- Pre-computed TMA partitions outside if blocks
2026-05-23 03:29:51 +00:00
7df3c7c952 d1: sweep hd=64,128,256 2026-05-23 03:26:10 +00:00
81378133cc fix: use mV.iterator 2026-05-23 03:25:29 +00:00
a66a9efd4c fix: use mQ not q for LayoutEnum 2026-05-23 03:24:58 +00:00
d2aaab5a32 d1: add diagnostic script 2026-05-23 03:24:16 +00:00
a2d063a48b D1: N-tile support for HEAD_DIM>256
- pv_n_tile = min(head_dim, 256) — MMA instruction N limit
- n_pv_tiles = head_dim // pv_n_tile — outer loop count
- V FMHA layout uses pv_n_tile (not head_dim) for N-tile slicing
- Test loops over N-tiles at Python level, kernel processes (128, pv_n_tile)
- For hd=512: 2 kernel launches with V[:,0:256] and V[:,256:512]
2026-05-23 03:22:23 +00:00
7bc097163d d1: add hd=512 test 2026-05-23 03:20:46 +00:00
32995c2ba3 d1: add quick regression test (hd=64 only) 2026-05-23 03:20:12 +00:00
eed981bee5 D1: Parameterize HEAD_DIM in FmhaKernel (64→512)
- Promote HEAD_DIM from module constant to constructor parameter
- FmhaKernel(head_dim=64, s_k=128, ...) — default 64 for regression
- All references to HEAD_DIM replaced with self.head_dim
- PV MMA tiler, V layout, softmax corr_tiles all parameterized
- TMEM budget warning when num_tmem_alloc_cols > 512
- New test: test_fmha_v3_stage_d1.py tests hd=64 (regression) and hd=512
- Stage C test preserved as-is for reference
2026-05-23 03:19:52 +00:00
a846193c4a cleanup: remove archive/ (240 stale files), stale example9/10, fix test table, add Stage D plan 2026-05-23 03:05:08 +00:00
9c331de7ba fix: revert to composition layout for hand-constructed atoms (matching CUTLASS) 2026-05-23 02:54:54 +00:00
3a2d3c66da fix: use logical_divide (not composition) for O rescale/normalize atoms to match get_tmem_load_op layout 2026-05-23 02:53:59 +00:00
3aba5cc6da fix: add NO-OP TMEM round-trip to re-map O from MMA to epilog layout 2026-05-23 02:50:53 +00:00
45cf89a556 fix: use TMEM round-trip normalize + epilogue_tma_store (known ~3% error) 2026-05-23 02:49:46 +00:00
350c7c36ac fix: correct bSG_gC indexing (6 modes) 2026-05-23 02:45:30 +00:00
6318b4da29 diag: print bSG shapes for TMA store indexing 2026-05-23 02:44:47 +00:00
28060dd944 fix: typo from_dlcap -> from_dlpack 2026-05-23 02:44:00 +00:00
048a546e76 fix: correction_epilog with paired atoms + pre-partitioned TMA store outside if block 2026-05-23 02:41:07 +00:00
0700745852 test: NO-OP round-trip + normalize at n=128 and n=256 2026-05-23 02:37:50 +00:00
2ebfcb2278 fix: correction_epilog with paired atoms + pre-partitioned TMA store 2026-05-23 02:34:33 +00:00
49bf6e8294 diag: NO-OP round-trip before normalize on 2D pattern 2026-05-23 02:32:40 +00:00
6cf1f17904 fix: O rescale uses 2D register tensor pattern, remove fence_view_async_tmem_load 2026-05-23 02:31:28 +00:00
7842d86294 fix: use paired atoms for correction_epilog + cute.copy TMA store 2026-05-23 02:26:57 +00:00
1f4e40decc diag: add CUDA_LAUNCH_BLOCKING for crash debug 2026-05-23 02:25:46 +00:00
728a24db6a fix: inline epilogue_tma_store with inv_row_sum multiply using paired atoms 2026-05-23 02:24:36 +00:00
0ecde542f1 fix: use cute.copy instead of cpasync.copy for TMA store 2026-05-23 02:23:16 +00:00
702bf8aa29 fix: correction_epilog with get_tmem_load_op paired atoms + direct TMA store 2026-05-23 02:19:41 +00:00
ea66b6ee8d diag: NO-OP TMEM round-trip test — load+store back unchanged 2026-05-23 02:15:28 +00:00