From b39301ebc673aae0a36b7c7ba74e5a68fdbfa5a4 Mon Sep 17 00:00:00 2001 From: biondizzle Date: Sat, 23 May 2026 05:36:22 +0000 Subject: [PATCH] Migrate Stage C kernel (proven cos 0.97) into module - exact copy, no modifications --- dsv4/kernels/attention/fmha.py | 471 +++++++++++++-------------------- 1 file changed, 184 insertions(+), 287 deletions(-) diff --git a/dsv4/kernels/attention/fmha.py b/dsv4/kernels/attention/fmha.py index 667318a2..d065e47d 100644 --- a/dsv4/kernels/attention/fmha.py +++ b/dsv4/kernels/attention/fmha.py @@ -1,8 +1,8 @@ -"""FMHA kernel: QK → online softmax → PV (CuTeDSL, Blackwell SM100). +"""FMHA kernel: QK -> online softmax -> PV (CuTeDSL, Blackwell SM100). -Unified module consolidating Stages A/B/C (TMEM-P, hd=64) and D1 (SMEM-P, hd>64). -use_smem_p=False (TMEM-P): P stored to TMEM via register bridge, PV reads from TMEM. -use_smem_p=True (SMEM-P): P stored to SMEM, PV reads from SMEM (copy TODO — zeroed stub). +Migrated from tests/unit/test_fmha_v3_stage_c.py — Stage C proven path. +P stored to TMEM via register bridge, PV reads from TMEM. +O rescale via correction_rescale atoms, O normalization via TMEM round-trip. """ import torch, cutlass, cutlass.cute as cute, cutlass.utils as utils, cutlass.pipeline as pipeline from cutlass.cute.nvgpu import cpasync, tcgen05 @@ -13,268 +13,155 @@ import cuda.bindings.driver as cuda import cutlass.torch as ct import math +HEAD_DIM = 64 -class FmhaKernel: - def __init__(self, head_dim=64, s_k=128, scale_softmax=None, kv_stage=2, use_smem_p=False): - self.head_dim = head_dim + +class FmhaV3StageC: + def __init__(self, s_k=128, scale_softmax=None): self.s_k = s_k self.n_kv_tiles = s_k // 128 - self.pv_n_tile = min(head_dim, 256) - self.n_pv_tiles = head_dim // self.pv_n_tile - self.use_smem_p = use_smem_p if use_smem_p is not None else (head_dim > 64) self.acc_dtype = Float32; self.qk_acc_dtype = Float32 self.q_dtype = BFloat16; self.o_dtype = BFloat16; self.c_dtype = BFloat16 self.use_2cta_instrs = False; self.epilog_sync_bar_id = 1 self.cluster_shape_mn = (1, 1); self.cta_group = tcgen05.CtaGroup.ONE - self.epilogue_warp_id = (0, 1, 2, 3); self.mma_warp_id = 4; self.tma_warp_id = 5 + self.epilogue_warp_id = (0,1,2,3); self.mma_warp_id = 4; self.tma_warp_id = 5 self.threads_per_cta = 192; self.num_c_stage = 2 - self.kv_stage = kv_stage; self.q_stage = 1; self.num_c_stage = 2 - self.scale_softmax = scale_softmax if scale_softmax is not None else 1.0 / math.sqrt(head_dim) + self.kv_stage = 2; self.q_stage = 1; self.num_c_stage = 2 + self.scale_softmax = scale_softmax if scale_softmax is not None else 1.0 / math.sqrt(HEAD_DIM) self.scale_softmax_log2 = self.scale_softmax * math.log2(math.e) def _setup(self, qk_mma, pv_mma): - hd = self.head_dim qk_ik = cute.size(qk_mma.shape_mnk, mode=[2]) self.qk_mma_tiler = (128, 128, qk_ik * 4) pv_ik = cute.size(pv_mma.shape_mnk, mode=[2]) - self.pv_mma_tiler = (128, self.pv_n_tile, pv_ik * (128 // pv_ik)) + self.pv_mma_tiler = (128, HEAD_DIM, pv_ik * (128 // pv_ik)) self.mma_tiler = self.qk_mma_tiler - self.cluster_layout_vmnk = cute.tiled_divide(cute.make_layout((1, 1, 1)), (qk_mma.thr_id.shape,)) - self.cta_tile_shape_mnk = ( - self.qk_mma_tiler[0] // cute.size(qk_mma.thr_id.shape), - self.pv_n_tile, - self.qk_mma_tiler[2], - ) + self.cluster_layout_vmnk = cute.tiled_divide(cute.make_layout((1,1,1)), (qk_mma.thr_id.shape,)) + self.cta_tile_shape_mnk = (self.qk_mma_tiler[0]//cute.size(qk_mma.thr_id.shape), HEAD_DIM, self.qk_mma_tiler[2]) self.c_layout = LayoutEnum.ROW_MAJOR - self.epi_tile = utils.sm100.compute_epilogue_tile_shape( - self.cta_tile_shape_mnk, False, self.c_layout, self.o_dtype - ) + self.epi_tile = utils.sm100.compute_epilogue_tile_shape(self.cta_tile_shape_mnk, False, self.c_layout, self.o_dtype) self.num_ab_stage = 1; self.num_acc_stage = 1 - - # SMEM layouts self.q_smem_s = utils.sm100.make_smem_layout_a(qk_mma, self.qk_mma_tiler, self.q_dtype, self.q_stage) self.k_smem_s = utils.sm100.make_smem_layout_b(qk_mma, self.qk_mma_tiler, self.q_dtype, self.kv_stage) self.v_smem_s = utils.sm100.make_smem_layout_b(pv_mma, self.pv_mma_tiler, self.q_dtype, self.kv_stage) - # P SMEM: always allocate (PV A-operand SMEM layout); used directly in SMEM-P, as TMEM alias in TMEM-P - self.p_smem_s = utils.sm100.make_smem_layout_a(pv_mma, self.pv_mma_tiler, self.q_dtype, 1) self.c_smem_s = utils.sm100.make_smem_layout_epi(self.o_dtype, self.c_layout, self.epi_tile, 2) - - # TMEM layout depends on path - qk_thr = qk_mma.get_slice(0) - qk_as = qk_thr.partition_shape_C(self.qk_mma_tiler[:2]) + self.p_tmem_s = utils.sm100.make_smem_layout_a(pv_mma, self.pv_mma_tiler, self.q_dtype, 1) + qk_thr = qk_mma.get_slice(0); qk_as = qk_thr.partition_shape_C(self.qk_mma_tiler[:2]) tStS = qk_thr.make_fragment_C(qk_as) - pv_thr = pv_mma.get_slice(0) - pv_as = pv_thr.partition_shape_C(self.pv_mma_tiler[:2]) + pv_thr = pv_mma.get_slice(0); pv_as = pv_thr.partition_shape_C(self.pv_mma_tiler[:2]) tOtO = pv_thr.make_fragment_C(pv_as) - - if not self.use_smem_p: - # TMEM-P: S at 0, P at 32, O after P and S - self.tmem_s0_offset = 0 - self.tmem_p0_offset = 32 - s_cols = self.qk_mma_tiler[1] - p_cols_fp32 = self.pv_mma_tiler[2] * self.q_dtype.width // self.qk_acc_dtype.width - p_end = self.tmem_p0_offset + p_cols_fp32 - o_after = max(s_cols, p_end) - self.tmem_o0_offset = ((o_after + 31) // 32) * 32 - o_cols = find_tmem_tensor_col_offset(tOtO) - total = self.tmem_o0_offset + o_cols - else: - # SMEM-P: S and O share TMEM (sequential, no P in TMEM) - self.tmem_s0_offset = 0 - self.tmem_o0_offset = 0 - s_cols = self.qk_mma_tiler[1] - o_cols = find_tmem_tensor_col_offset(tOtO) - total = max(s_cols, o_cols) - + self.tmem_s0_offset = 0; self.tmem_p0_offset = 32 + p_cols_fp32 = self.pv_mma_tiler[2] * self.q_dtype.width // self.qk_acc_dtype.width + p_end = self.tmem_p0_offset + p_cols_fp32 + s_cols = self.qk_mma_tiler[1] + o_after = max(s_cols, p_end) + self.tmem_o0_offset = ((o_after + 31) // 32) * 32 + o_cols = find_tmem_tensor_col_offset(tOtO) + total = self.tmem_o0_offset + o_cols self.num_tmem_alloc_cols = 1 while self.num_tmem_alloc_cols < total: self.num_tmem_alloc_cols *= 2 - if self.num_tmem_alloc_cols > 512: - print(f"⚠️ TMEM BUDGET: {self.num_tmem_alloc_cols} cols (hd={hd})") - - # P TMEM layout (PV A-operand SMEM layout — used to alias QK C-fragment in TMEM) - self.p_tmem_s = utils.sm100.make_smem_layout_a(pv_mma, self.pv_mma_tiler, self.q_dtype, 1) - - # TMA bytes cta = cute.size(qk_mma.thr_id.shape) - q_s = cute.slice_(self.q_smem_s, (None, None, None, 0)) - k_s = cute.slice_(self.k_smem_s, (None, None, None, 0)) - v_s = cute.slice_(self.v_smem_s, (None, None, None, 0)) + q_s = cute.slice_(self.q_smem_s,(None,None,None,0)) + k_s = cute.slice_(self.k_smem_s,(None,None,None,0)) + v_s = cute.slice_(self.v_smem_s,(None,None,None,0)) self.q_tx_bytes = cute.size_in_bytes(self.q_dtype, q_s) * cta - self.kv_tx_bytes = (cute.size_in_bytes(self.q_dtype, k_s) + cute.size_in_bytes(self.q_dtype, v_s)) * cta + self.kv_tx_bytes = (cute.size_in_bytes(self.q_dtype, k_s) + + cute.size_in_bytes(self.q_dtype, v_s)) * cta @cute.jit def __call__(self, q, k, v, c, stream): self.q_dtype = q.element_type; self.o_dtype = c.element_type; self.c_dtype = self.o_dtype self.a_major = LayoutEnum.from_tensor(q).mma_major_mode() self.b_major = LayoutEnum.from_tensor(k).mma_major_mode() - v_n = self.pv_n_tile - v_fmha = cute.make_tensor(v.iterator, cute.make_layout((v_n, self.s_k, 1), stride=(1, v_n, v_n * self.s_k))) + v_fmha = cute.make_tensor( + v.iterator, + cute.make_layout( + (HEAD_DIM, self.s_k, 1), + stride=(1, HEAD_DIM, HEAD_DIM * self.s_k), + ), + ) self.v_major = LayoutEnum.from_tensor(v_fmha).mma_major_mode() self.c_layout = LayoutEnum.from_tensor(c) - - qk_mma = utils.sm100.make_trivial_tiled_mma( - self.q_dtype, self.q_dtype, self.a_major, self.b_major, self.qk_acc_dtype, - self.cta_group, (128, 128), tcgen05.OperandSource.SMEM, - ) - pv_src = tcgen05.OperandSource.SMEM if self.use_smem_p else tcgen05.OperandSource.TMEM - # When PV reads P from TMEM, P has K-major layout (QK C-fragment alias). - # When PV reads P from SMEM, P has Q's major mode (loaded into SMEM). - pv_a_major = self.a_major if self.use_smem_p else cute.nvgpu.OperandMajorMode.K - pv_mma = utils.sm100.make_trivial_tiled_mma( - self.q_dtype, self.q_dtype, pv_a_major, self.v_major, self.qk_acc_dtype, - self.cta_group, (128, self.pv_n_tile), pv_src, - ) + qk_mma = utils.sm100.make_trivial_tiled_mma(self.q_dtype, self.q_dtype, self.a_major, self.b_major, self.qk_acc_dtype, self.cta_group, (128,128), tcgen05.OperandSource.SMEM) + pv_mma = utils.sm100.make_trivial_tiled_mma(self.q_dtype, self.q_dtype, cute.nvgpu.OperandMajorMode.K, self.v_major, self.qk_acc_dtype, self.cta_group, (128,HEAD_DIM), tcgen05.OperandSource.TMEM) self._setup(qk_mma, pv_mma) - - q_s = cute.slice_(self.q_smem_s, (None, None, None, 0)) - k_s = cute.slice_(self.k_smem_s, (None, None, None, 0)) - v_s = cute.slice_(self.v_smem_s, (None, None, None, 0)) - tma_q, mQ = cute.nvgpu.make_tiled_tma_atom_A( - utils.sm100.cluster_shape_to_tma_atom_A(self.cluster_shape_mn, qk_mma.thr_id), - q, q_s, self.qk_mma_tiler, qk_mma, self.cluster_layout_vmnk.shape, - ) - tma_k, mK = cute.nvgpu.make_tiled_tma_atom_B( - utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn, qk_mma.thr_id), - k, k_s, self.qk_mma_tiler, qk_mma, self.cluster_layout_vmnk.shape, - ) - tma_v, mV = cute.nvgpu.make_tiled_tma_atom_B( - utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn, pv_mma.thr_id), - v_fmha, v_s, self.pv_mma_tiler, pv_mma, self.cluster_layout_vmnk.shape, - ) - epi_s = cute.select(self.c_smem_s, mode=[0, 1]) - tma_c, mC = cpasync.make_tiled_tma_atom(cpasync.CopyBulkTensorTileS2GOp(), c, epi_s, self.epi_tile) - - self._kernel( - qk_mma, pv_mma, tma_q, mQ, tma_k, mK, tma_v, mV, tma_c, mC, - self.cluster_layout_vmnk, - self.q_smem_s, self.k_smem_s, self.v_smem_s, self.p_smem_s, self.p_tmem_s, self.c_smem_s, - self.epi_tile, - ).launch( - grid=(1, 1, 1), block=[self.threads_per_cta, 1, 1], stream=stream, - ) + q_s = cute.slice_(self.q_smem_s,(None,None,None,0)); k_s = cute.slice_(self.k_smem_s,(None,None,None,0)); v_s = cute.slice_(self.v_smem_s,(None,None,None,0)) + tma_q,mQ = cute.nvgpu.make_tiled_tma_atom_A(utils.sm100.cluster_shape_to_tma_atom_A(self.cluster_shape_mn,qk_mma.thr_id),q,q_s,self.qk_mma_tiler,qk_mma,self.cluster_layout_vmnk.shape) + tma_k,mK = cute.nvgpu.make_tiled_tma_atom_B(utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn,qk_mma.thr_id),k,k_s,self.qk_mma_tiler,qk_mma,self.cluster_layout_vmnk.shape) + tma_v,mV = cute.nvgpu.make_tiled_tma_atom_B(utils.sm100.cluster_shape_to_tma_atom_B(self.cluster_shape_mn,pv_mma.thr_id),v_fmha,v_s,self.pv_mma_tiler,pv_mma,self.cluster_layout_vmnk.shape) + epi_s = cute.select(self.c_smem_s,mode=[0,1]) + tma_c,mC = cpasync.make_tiled_tma_atom(cpasync.CopyBulkTensorTileS2GOp(),c,epi_s,self.epi_tile) + self._kernel(qk_mma,pv_mma,tma_q,mQ,tma_k,mK,tma_v,mV,tma_c,mC,self.cluster_layout_vmnk,self.q_smem_s,self.k_smem_s,self.v_smem_s,self.p_tmem_s,self.c_smem_s,self.epi_tile).launch(grid=(1,1,1),block=[self.threads_per_cta,1,1],stream=stream) @cute.kernel - def _kernel( - self, qk_mma, pv_mma, tma_q, mQ, tma_k, mK, tma_v, mV, tma_c, mC, - cl_vmnk, q_smem_s, k_smem_s, v_smem_s, p_smem_s, p_tmem_s, c_smem_s, epi_tile, - ): + def _kernel(self, qk_mma, pv_mma, tma_q, mQ, tma_k, mK, tma_v, mV, tma_c, mC, cl_vmnk, q_smem_s, k_smem_s, v_smem_s, p_tmem_s, c_smem_s, epi_tile): warp_idx = cute.arch.make_warp_uniform(cute.arch.warp_idx()) - tidx, _, _ = cute.arch.thread_idx() - - use_smem_p = self.use_smem_p - - # ── TMA warp: prefetch descriptors ── + tidx,_,_ = cute.arch.thread_idx() if warp_idx == self.tma_warp_id: - cpasync.prefetch_descriptor(tma_q) - cpasync.prefetch_descriptor(tma_k) - cpasync.prefetch_descriptor(tma_v) - cpasync.prefetch_descriptor(tma_c) + cpasync.prefetch_descriptor(tma_q); cpasync.prefetch_descriptor(tma_k); cpasync.prefetch_descriptor(tma_v); cpasync.prefetch_descriptor(tma_c) - # ── Shared storage ── @cute.struct class SS: - q_bar: cute.struct.MemRange[cutlass.Int64, self.q_stage * 2] - kv_bar: cute.struct.MemRange[cutlass.Int64, self.kv_stage * 2] + q_bar: cute.struct.MemRange[cutlass.Int64, self.q_stage*2] + kv_bar: cute.struct.MemRange[cutlass.Int64, self.kv_stage*2] s_bar: cute.struct.MemRange[cutlass.Int64, 2] - acc_bar: cute.struct.MemRange[cutlass.Int64, self.num_acc_stage * 2] + acc_bar: cute.struct.MemRange[cutlass.Int64, self.num_acc_stage*2] tmem_dealloc: cutlass.Int64; holding: cutlass.Int32 - smem = utils.SmemAllocator(); st = smem.allocate(SS) - qp, qc = pipeline.PipelineTmaUmma.create( - barrier_storage=st.q_bar.data_ptr(), num_stages=self.q_stage, - producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread), - consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread, 1), - tx_count=self.q_tx_bytes, cta_layout_vmnk=cl_vmnk, defer_sync=True, - ).make_participants() - kvp, kvc = pipeline.PipelineTmaUmma.create( - barrier_storage=st.kv_bar.data_ptr(), num_stages=self.kv_stage, - producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread), - consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread, 1), - tx_count=self.kv_tx_bytes, cta_layout_vmnk=cl_vmnk, defer_sync=True, - ).make_participants() - s_prod, s_cons = pipeline.PipelineUmmaAsync.create( - barrier_storage=st.s_bar.data_ptr(), num_stages=1, - producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread), - consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread, 32 * len(self.epilogue_warp_id)), - ).make_participants() - softmax_done_bar = pipeline.NamedBarrier(barrier_id=3, num_threads=32 + 32 * len(self.epilogue_warp_id)) - final_o_bar = pipeline.NamedBarrier(barrier_id=4, num_threads=32 + 32 * len(self.epilogue_warp_id)) - acc_pipe = pipeline.PipelineUmmaAsync.create( - barrier_storage=st.acc_bar.data_ptr(), num_stages=self.num_acc_stage, - producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread), - consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread, len(self.epilogue_warp_id)), - cta_layout_vmnk=cl_vmnk, defer_sync=True, - ) - tmem_bar = pipeline.NamedBarrier(barrier_id=2, num_threads=32 * len((self.mma_warp_id, *self.epilogue_warp_id))) - tmem = utils.TmemAllocator( - st.holding.ptr, barrier_for_retrieve=tmem_bar, - allocator_warp_id=self.epilogue_warp_id[0], - is_two_cta=cute.size(qk_mma.thr_id.shape) == 2, - two_cta_tmem_dealloc_mbar_ptr=st.tmem_dealloc.ptr, - ) - pipeline.pipeline_init_arrive(cluster_shape_mn=cl_vmnk, is_relaxed=True) + qp,qc = pipeline.PipelineTmaUmma.create(barrier_storage=st.q_bar.data_ptr(),num_stages=self.q_stage,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,1),tx_count=self.q_tx_bytes,cta_layout_vmnk=cl_vmnk,defer_sync=True).make_participants() + kvp,kvc = pipeline.PipelineTmaUmma.create(barrier_storage=st.kv_bar.data_ptr(),num_stages=self.kv_stage,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,1),tx_count=self.kv_tx_bytes,cta_layout_vmnk=cl_vmnk,defer_sync=True).make_participants() + s_prod,s_cons = pipeline.PipelineUmmaAsync.create(barrier_storage=st.s_bar.data_ptr(),num_stages=1,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,32*len(self.epilogue_warp_id))).make_participants() + softmax_done_bar = pipeline.NamedBarrier(barrier_id=3, num_threads=32 + 32*len(self.epilogue_warp_id)) + final_o_bar = pipeline.NamedBarrier(barrier_id=4, num_threads=32 + 32*len(self.epilogue_warp_id)) + acc_pipe = pipeline.PipelineUmmaAsync.create(barrier_storage=st.acc_bar.data_ptr(),num_stages=self.num_acc_stage,producer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread),consumer_group=pipeline.CooperativeGroup(pipeline.Agent.Thread,len(self.epilogue_warp_id)),cta_layout_vmnk=cl_vmnk,defer_sync=True) + tmem_bar = pipeline.NamedBarrier(barrier_id=2,num_threads=32*len((self.mma_warp_id,*self.epilogue_warp_id))) + tmem = utils.TmemAllocator(st.holding.ptr,barrier_for_retrieve=tmem_bar,allocator_warp_id=self.epilogue_warp_id[0],is_two_cta=cute.size(qk_mma.thr_id.shape)==2,two_cta_tmem_dealloc_mbar_ptr=st.tmem_dealloc.ptr) + pipeline.pipeline_init_arrive(cluster_shape_mn=cl_vmnk,is_relaxed=True) - # ── SMEM tensors ── - sQ = smem.allocate_tensor(element_type=self.q_dtype, layout=q_smem_s.outer, byte_alignment=128, swizzle=q_smem_s.inner) - sK = smem.allocate_tensor(element_type=self.q_dtype, layout=k_smem_s.outer, byte_alignment=128, swizzle=k_smem_s.inner) - sV = smem.allocate_tensor(element_type=self.q_dtype, layout=v_smem_s.outer, byte_alignment=128, swizzle=v_smem_s.inner) - sP = smem.allocate_tensor(element_type=self.q_dtype, layout=p_smem_s.outer, byte_alignment=128, swizzle=p_smem_s.inner) - sC = smem.allocate_tensor(element_type=self.o_dtype, layout=c_smem_s.outer, byte_alignment=128, swizzle=c_smem_s.inner) + sQ = smem.allocate_tensor(element_type=self.q_dtype,layout=q_smem_s.outer,byte_alignment=128,swizzle=q_smem_s.inner) + sK = smem.allocate_tensor(element_type=self.q_dtype,layout=k_smem_s.outer,byte_alignment=128,swizzle=k_smem_s.inner) + sV = smem.allocate_tensor(element_type=self.q_dtype,layout=v_smem_s.outer,byte_alignment=128,swizzle=v_smem_s.inner) + sC = smem.allocate_tensor(element_type=self.o_dtype,layout=c_smem_s.outer,byte_alignment=128,swizzle=c_smem_s.inner) - # ── Gmem tensors ── - gQ = cute.local_tile(mQ, cute.slice_(self.qk_mma_tiler, (None, 0, None)), (None, None, None)) - gK = cute.local_tile(mK, cute.slice_(self.qk_mma_tiler, (0, None, None)), (None, None, None)) - gV = cute.local_tile(mV, cute.slice_(self.pv_mma_tiler, (0, None, None)), (None, None, None)) - gC = cute.local_tile(mC, cute.slice_(self.pv_mma_tiler, (None, None, 0)), (None, None, None)) + gQ = cute.local_tile(mQ,cute.slice_(self.qk_mma_tiler,(None,0,None)),(None,None,None)) + gK = cute.local_tile(mK,cute.slice_(self.qk_mma_tiler,(0,None,None)),(None,None,None)) + gV = cute.local_tile(mV,cute.slice_(self.pv_mma_tiler,(0,None,None)),(None,None,None)) + gC = cute.local_tile(mC,cute.slice_(self.pv_mma_tiler,(None,None,0)),(None,None,None)) + n_kv_tiles = cute.size(gK, mode=[3]) - # ── Thread partitions ── qk_thr = qk_mma.get_slice(0); pv_thr = pv_mma.get_slice(0) tCgQ = qk_thr.partition_A(gQ); tCgK = qk_thr.partition_B(gK) tCgV = pv_thr.partition_B(gV); tCgC = pv_thr.partition_C(gC) + a_lay = cute.make_layout(cute.slice_(cl_vmnk,(0,0,None,0)).shape) + tAsQ,tAgQ = cpasync.tma_partition(tma_q,0,a_lay,cute.group_modes(sQ,0,3),cute.group_modes(tCgQ,0,3)) + b_lay = cute.make_layout(cute.slice_(cl_vmnk,(0,None,0,0)).shape) + tBsK,tBgK = cpasync.tma_partition(tma_k,0,b_lay,cute.group_modes(sK,0,3),cute.group_modes(tCgK,0,3)) + tVsV,tVgV = cpasync.tma_partition(tma_v,0,b_lay,cute.group_modes(sV,0,3),cute.group_modes(tCgV,0,3)) + tAgQ = tAgQ[(None,0,None,0)]; tBgK = tBgK[(None,0,None,0)]; tVgV = tVgV[(None,0,None,0)] - a_lay = cute.make_layout(cute.slice_(cl_vmnk, (0, 0, None, 0)).shape) - tAsQ, tAgQ = cpasync.tma_partition(tma_q, 0, a_lay, cute.group_modes(sQ, 0, 3), cute.group_modes(tCgQ, 0, 3)) - b_lay = cute.make_layout(cute.slice_(cl_vmnk, (0, None, 0, 0)).shape) - tBsK, tBgK = cpasync.tma_partition(tma_k, 0, b_lay, cute.group_modes(sK, 0, 3), cute.group_modes(tCgK, 0, 3)) - tVsV, tVgV = cpasync.tma_partition(tma_v, 0, b_lay, cute.group_modes(sV, 0, 3), cute.group_modes(tCgV, 0, 3)) - tAgQ = tAgQ[(None, 0, None, 0)]; tBgK = tBgK[(None, 0, None, 0)]; tVgV = tVgV[(None, 0, None, 0)] - - # Register fragments tCrQ = qk_mma.make_fragment_A(sQ); tCrK = qk_mma.make_fragment_B(sK) tCrV = pv_mma.make_fragment_B(sV) - tCrP = pv_mma.make_fragment_A(sP) # used in SMEM-P path - # ── TMEM: S (QK result) ── qk_as = qk_thr.partition_shape_C(self.qk_mma_tiler[:2]) tStS = qk_thr.make_fragment_C(qk_as) tStS0 = cute.make_tensor(tStS.iterator + self.tmem_s0_offset, tStS.layout) - - # ── TMEM: O (PV result) ── pv_as = pv_thr.partition_shape_C(self.pv_mma_tiler[:2]) tOtO = pv_thr.make_fragment_C(pv_as) tOtO0 = cute.make_tensor(tOtO.iterator + self.tmem_o0_offset, tOtO.layout) - # ── PV A-operand: always define both tOrP0 (TMEM) and tCrP (SMEM) ── - # CuTeDSL can't propagate variables across if/else regions, so we - # unconditionally compute both and the unused one is dead-code-eliminated. tP = cute.make_tensor(tStS.iterator, p_tmem_s.outer) tOrP_base = pv_thr.make_fragment_A(tP) - tOrP = tOrP_base[(None, None, None, 0)] + tOrP = tOrP_base[(None,None,None,0)] tOrP0 = cute.make_tensor( tOrP.iterator + self.qk_acc_dtype.width // self.q_dtype.width * self.tmem_p0_offset, - tOrP.layout, - ) - tCrP = pv_mma.make_fragment_A(sP) + tOrP.layout) tCtO_fake = pv_mma.make_fragment_C(cute.append(pv_as, self.num_acc_stage)) - pipeline.pipeline_init_wait(cluster_shape_mn=cl_vmnk) - # ══════════════════════════════════════════════════════════════ - # TMA LOAD WARP - # ══════════════════════════════════════════════════════════════ + # ===== TMA LOAD warp ===== if warp_idx == self.tma_warp_id: qp.reset(); qh = qp.acquire_and_advance() cute.copy(tma_q, tAgQ[(None, Int32(0))], tAsQ[(None, qh.index)], tma_bar_ptr=qh.barrier) @@ -287,57 +174,41 @@ class FmhaKernel: pk = cutlass.Boolean(1) kvp.tail() - # ══════════════════════════════════════════════════════════════ - # MMA WARP - # ══════════════════════════════════════════════════════════════ + # ===== MMA warp ===== if warp_idx == self.mma_warp_id: tmem.wait_for_alloc() qc.reset(); qh = qc.wait_and_advance(); qh.release() kvc.reset(); pk = kvc.try_wait() acc_st = pipeline.make_pipeline_state(pipeline.PipelineUserType.Producer, self.num_acc_stage) acc_pipe.producer_acquire(acc_st) - for kt in range(self.n_kv_tiles): kvh = kvc.wait_and_advance(pk); pk = cutlass.Boolean(1) sh = s_prod.acquire_and_advance() - - # QK GEMM → S in TMEM qk_mma.set(tcgen05.Field.ACCUMULATE, False) for kb in cutlass.range(cute.size(tCrQ, mode=[2]), unroll_full=True): - cute.gemm(qk_mma, tStS0, tCrQ[(None, None, kb, 0)], tCrK[(None, None, kb, kvh.index)], tStS0) + cute.gemm(qk_mma, tStS0, tCrQ[(None,None,kb,0)], tCrK[(None,None,kb,kvh.index)], tStS0) qk_mma.set(tcgen05.Field.ACCUMULATE, True) cute.arch.fence_view_async_tmem_store() sh.commit() softmax_done_bar.arrive_and_wait() - - # PV GEMM → O in TMEM pv_mma.set(tcgen05.Field.ACCUMULATE, kt != 0) - if not use_smem_p: - # TMEM-P: P from TMEM - for kb in cutlass.range(cute.size(tOrP0, mode=[2]), unroll_full=True): - cute.gemm(pv_mma, tOtO0, tOrP0[(None, None, kb)], tCrV[(None, None, kb, kvh.index)], tOtO0) - else: - # SMEM-P: P from SMEM - for kb in cutlass.range(cute.size(tCrP, mode=[2]), unroll_full=True): - cute.gemm(pv_mma, tOtO0, tCrP[(None, None, kb, 0)], tCrV[(None, None, kb, kvh.index)], tOtO0) - pv_mma.set(tcgen05.Field.ACCUMULATE, True) + for kb in cutlass.range(cute.size(tOrP0, mode=[2]), unroll_full=True): + cute.gemm(pv_mma, tOtO0, tOrP0[(None,None,kb)], tCrV[(None,None,kb,kvh.index)], tOtO0) + pv_mma.set(tcgen05.Field.ACCUMULATE, True) cute.arch.fence_view_async_tmem_store() kvh.release() - acc_pipe.producer_commit(acc_st); acc_st.advance() final_o_bar.arrive() acc_pipe.producer_tail(acc_st) - # ══════════════════════════════════════════════════════════════ - # SOFTMAX + EPILOGUE WARPS - # ══════════════════════════════════════════════════════════════ + # ===== SOFTMAX + CORRECTION EPILOGUE warps ===== if warp_idx < self.mma_warp_id: tmem.allocate(self.num_tmem_alloc_cols) tmem.wait_for_alloc() tmem_ptr = tmem.retrieve_ptr(self.qk_acc_dtype) sfw_idx = tidx % (32 * len(self.epilogue_warp_id)) - # ── S load setup ── + # S load atoms tmem_load_atom = cute.make_copy_atom(tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(32)), self.qk_acc_dtype) tiled_tmem_load = tcgen05.make_tmem_copy(tmem_load_atom, tStS0) thr_load = tiled_tmem_load.get_slice(sfw_idx) @@ -346,14 +217,11 @@ class FmhaKernel: tScS = qk_thr.partition_C(cS) tTMEM_LOADcS = thr_load.partition_D(tScS) - # ── P store setup (always define both paths — CuTeDSL scoping) ── - # TMEM-P: register bridge for P → TMEM + # P store atoms p_cols_fp32 = self.pv_mma_tiler[2] * self.q_dtype.width // self.qk_acc_dtype.width tStP_layout = cute.composition(tStS.layout, cute.make_layout((self.pv_mma_tiler[0], p_cols_fp32))) tStP0 = cute.make_tensor(tStS.iterator + self.tmem_p0_offset, tStP_layout) - tmem_store_atom = cute.make_copy_atom( - tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(32)), self.qk_acc_dtype, - ) + tmem_store_atom = cute.make_copy_atom(tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(32)), self.qk_acc_dtype) tiled_tmem_store = tcgen05.make_tmem_copy(tmem_store_atom, tStP0) thr_store = tiled_tmem_store.get_slice(sfw_idx) tTMEM_STOREtP = thr_store.partition_D(tStP0) @@ -361,17 +229,25 @@ class FmhaKernel: tScP = cute.make_tensor(tScS.iterator, tScP_layout) tTMEM_STOREcP = thr_store.partition_S(tScP) - # SMEM-P: TODO — make_tiled_copy_C(store_atom, qk_mma) for QK→PV partition remap + row_max = -Float32.inf + row_sum = Float32(0.0) + scale_log2 = Float32(self.scale_softmax_log2) - # ── O rescale / normalization setup (correction_rescale pattern from Stage C) ── + # O rescale atoms (hand-constructed, using composition layout like CUTLASS correction_rescale) corr_tile_size = 16 tOcO = pv_thr.partition_C(cS) tOtO_i_layout = cute.composition(tOtO0.layout, cute.make_layout((128, corr_tile_size))) tOcO_i_layout = cute.composition(tOcO.layout, cute.make_layout((128, corr_tile_size))) tOtO_i = cute.make_tensor(tOtO0.iterator, tOtO_i_layout) tOcO_i = cute.make_tensor(tOcO.iterator, tOcO_i_layout) - tmem_load_o_atom = cute.make_copy_atom(tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(corr_tile_size)), self.acc_dtype) - tmem_store_o_atom = cute.make_copy_atom(tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(corr_tile_size)), self.acc_dtype) + tmem_load_o_atom = cute.make_copy_atom( + tcgen05.copy.Ld32x32bOp(tcgen05.copy.Repetition(corr_tile_size)), + self.acc_dtype, + ) + tmem_store_o_atom = cute.make_copy_atom( + tcgen05.copy.St32x32bOp(tcgen05.copy.Repetition(corr_tile_size)), + self.acc_dtype, + ) tiled_tmem_load_o = tcgen05.make_tmem_copy(tmem_load_o_atom, tOtO_i) tiled_tmem_store_o = tcgen05.make_tmem_copy(tmem_store_o_atom, tOtO_i) thr_tmem_load_o = tiled_tmem_load_o.get_slice(sfw_idx) @@ -379,16 +255,11 @@ class FmhaKernel: tTMEM_LOADtO = thr_tmem_load_o.partition_S(tOtO_i) tTMEM_LOADcO = thr_tmem_load_o.partition_D(tOcO_i) tTMEM_STOREtO = thr_tmem_store_o.partition_D(tOtO_i) - n_corr_tiles = self.head_dim // corr_tile_size + n_corr_tiles = HEAD_DIM // corr_tile_size - # ── Online softmax state ── - row_max = -Float32.inf - row_sum = Float32(0.0) - scale_log2 = Float32(self.scale_softmax_log2) - - # ── Softmax loop ── for kt in range(self.n_kv_tiles): si_handle = s_cons.wait_and_advance() + tTMEM_LOADrS = cute.make_rmem_tensor(tTMEM_LOADcS.shape, self.qk_acc_dtype) cute.copy(tiled_tmem_load, tTMEM_LOADtS, tTMEM_LOADrS) cute.arch.fence_view_async_tmem_load() @@ -397,8 +268,6 @@ class FmhaKernel: frg_cnt = 4 frg_tile = cute.size(tTMEM_LOADrS) // frg_cnt tTMEM_LOADrS_frg = cute.logical_divide(tTMEM_LOADrS, cute.make_layout(frg_tile)) - - # Row max for j in range(frg_cnt): for k in range(cute.size(tTMEM_LOADrS_frg, mode=[0])): row_max = cute.arch.fmax(row_max, tTMEM_LOADrS_frg[k, j] * scale_log2) @@ -406,87 +275,114 @@ class FmhaKernel: row_max_safe = row_max if row_max == -cutlass.Float32.inf: row_max_safe = Float32(0.0) + acc_scale_ = old_row_max - row_max_safe acc_scale = cute.math.exp2(acc_scale_, fastmath=True) if old_row_max == -cutlass.Float32.inf: acc_scale = Float32(0.0) row_sum *= acc_scale + + rP_words = cute.make_rmem_tensor(tTMEM_STOREcP.shape, self.qk_acc_dtype) + rP_bf16 = cute.make_tensor(cute.recast_ptr(rP_words.iterator, dtype=self.q_dtype), tTMEM_LOADrS.layout) minus_row_max = Float32(0.0) - row_max_safe - # Softmax + P store - if not use_smem_p: - # TMEM-P: register bridge — FP32 backing, BF16 view - rP_words = cute.make_rmem_tensor(tTMEM_STOREcP.shape, self.qk_acc_dtype) - rP_bf16 = cute.make_tensor( - cute.recast_ptr(rP_words.iterator, dtype=self.q_dtype), - tTMEM_LOADrS.layout, - ) - rP_bf16_frg = cute.logical_divide(rP_bf16, cute.make_layout(frg_tile)) + rP_bf16_frg = cute.logical_divide(rP_bf16, cute.make_layout(frg_tile)) + for j in range(frg_cnt): + for k in range(cute.size(tTMEM_LOADrS_frg, mode=[0])): + tTMEM_LOADrS_frg[k, j] = tTMEM_LOADrS_frg[k, j] * scale_log2 + minus_row_max + tTMEM_LOADrS_frg[k, j] = cute.math.exp2(tTMEM_LOADrS_frg[k, j], fastmath=True) + row_sum = row_sum + tTMEM_LOADrS_frg[k, j] + s_vec = tTMEM_LOADrS_frg[None, j].load() + rP_bf16_frg[None, j].store(s_vec.to(self.q_dtype)) - for j in range(frg_cnt): - for k in range(cute.size(tTMEM_LOADrS_frg, mode=[0])): - tTMEM_LOADrS_frg[k, j] = tTMEM_LOADrS_frg[k, j] * scale_log2 + minus_row_max - tTMEM_LOADrS_frg[k, j] = cute.math.exp2(tTMEM_LOADrS_frg[k, j], fastmath=True) - row_sum = row_sum + tTMEM_LOADrS_frg[k, j] - s_vec = tTMEM_LOADrS_frg[None, j].load() - rP_bf16_frg[None, j].store(s_vec.to(self.q_dtype)) + cute.copy(tiled_tmem_store, rP_words, tTMEM_STOREtP) + cute.arch.fence_view_async_tmem_store() - cute.copy(tiled_tmem_store, rP_words, tTMEM_STOREtP) - cute.arch.fence_view_async_tmem_store() - else: - # SMEM-P: compute softmax, write P to SMEM (TODO) - for j in range(frg_cnt): - for k in range(cute.size(tTMEM_LOADrS_frg, mode=[0])): - tTMEM_LOADrS_frg[k, j] = tTMEM_LOADrS_frg[k, j] * scale_log2 + minus_row_max - tTMEM_LOADrS_frg[k, j] = cute.math.exp2(tTMEM_LOADrS_frg[k, j], fastmath=True) - row_sum = row_sum + tTMEM_LOADrS_frg[k, j] - - # TODO: Write P to SMEM using make_tiled_copy_C(store_atom, qk_mma) - # to partition threads by QK's C-fragment, then copy to p_smem_s layout. - # STUB: zero P in SMEM for now - for j in cutlass.range(cute.size(sP), vectorize=True): - sP[j] = BFloat16(0.0) - cute.arch.fence_proxy("async.shared", space="cta") - - si_handle.release() - softmax_done_bar.arrive() - - # ── Per-tile O rescale (multiply O by acc_scale when kt > 0) ── + # Per-tile O rescale (hand-constructed atoms with logical_divide layout) if kt > 0: - tTMrO = cute.make_rmem_tensor((tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype) + tTMrO = cute.make_rmem_tensor( + (tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype + ) for i in range(n_corr_tiles): tTMrO_i_ = tTMrO[None, i] - tTMrO_i_layout = cute.composition(tTMrO_i_.layout, cute.make_layout(tTMrO.shape[0])) + tTMrO_i_layout = cute.composition( + tTMrO_i_.layout, cute.make_layout(tTMrO.shape[0]) + ) tTMrO_i = cute.make_tensor(tTMrO_i_.iterator, tTMrO_i_layout) - tTMEM_LOADtO_i = cute.make_tensor(tTMEM_LOADtO.iterator + i * corr_tile_size, tTMEM_LOADtO.layout) - tTMEM_STOREtO_i = cute.make_tensor(tTMEM_STOREtO.iterator + i * corr_tile_size, tTMEM_STOREtO.layout) + tTMEM_LOADtO_i = cute.make_tensor( + tTMEM_LOADtO.iterator + i * corr_tile_size, + tTMEM_LOADtO.layout, + ) + tTMEM_STOREtO_i = cute.make_tensor( + tTMEM_STOREtO.iterator + i * corr_tile_size, + tTMEM_STOREtO.layout, + ) cute.copy(tiled_tmem_load_o, tTMEM_LOADtO_i, tTMrO_i) for k in cutlass.range(cute.size(tTMrO_i), vectorize=True): tTMrO_i[k] = tTMrO_i[k] * acc_scale cute.copy(tiled_tmem_store_o, tTMrO_i, tTMEM_STOREtO_i) cute.arch.fence_view_async_tmem_store() - # ── Wait for MMA's final PV GEMM ── + si_handle.release() + softmax_done_bar.arrive() + + # Wait for MMA's PV[N-1] to commit before reading O. final_o_bar.arrive_and_wait() - # ── O normalization: multiply O by 1/row_sum (TMEM round-trip) ── - inv_row_sum = Float32(1.0) / row_sum - tTMrO = cute.make_rmem_tensor((tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype) + # === NO-OP TMEM round-trip: re-map O from MMA layout to epilog layout === + tTMrO_noop = cute.make_rmem_tensor( + (tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype + ) for i in range(n_corr_tiles): - tTMrO_i_ = tTMrO[None, i] - tTMrO_i_layout = cute.composition(tTMrO_i_.layout, cute.make_layout(tTMrO.shape[0])) + tTMrO_i_ = tTMrO_noop[None, i] + tTMrO_i_layout = cute.composition( + tTMrO_i_.layout, cute.make_layout(tTMrO_noop.shape[0]) + ) tTMrO_i = cute.make_tensor(tTMrO_i_.iterator, tTMrO_i_layout) - tTMEM_LOADtO_i = cute.make_tensor(tTMEM_LOADtO.iterator + i * corr_tile_size, tTMEM_LOADtO.layout) - tTMEM_STOREtO_i = cute.make_tensor(tTMEM_STOREtO.iterator + i * corr_tile_size, tTMEM_STOREtO.layout) + tTMEM_LOADtO_i = cute.make_tensor( + tTMEM_LOADtO.iterator + i * corr_tile_size, + tTMEM_LOADtO.layout, + ) + tTMEM_STOREtO_i = cute.make_tensor( + tTMEM_STOREtO.iterator + i * corr_tile_size, + tTMEM_STOREtO.layout, + ) cute.copy(tiled_tmem_load_o, tTMEM_LOADtO_i, tTMrO_i) - for k in cutlass.range(cute.size(tTMrO_i), vectorize=True): - tTMrO_i[k] = tTMrO_i[k] * inv_row_sum cute.copy(tiled_tmem_store_o, tTMrO_i, tTMEM_STOREtO_i) cute.arch.fence_view_async_tmem_store() - # ── Epilogue: TMA store O → global ── + # === Final O normalization: O *= 1/row_sum === + inv_row_sum = Float32(1.0) / row_sum + + tTMrO = cute.make_rmem_tensor( + (tTMEM_LOADcO.shape, 128 // corr_tile_size), self.acc_dtype + ) + + for i in range(n_corr_tiles): + tTMrO_i_ = tTMrO[None, i] + tTMrO_i_layout = cute.composition( + tTMrO_i_.layout, cute.make_layout(tTMrO.shape[0]) + ) + tTMrO_i = cute.make_tensor(tTMrO_i_.iterator, tTMrO_i_layout) + tTMEM_LOADtO_i = cute.make_tensor( + tTMEM_LOADtO.iterator + i * corr_tile_size, tTMEM_LOADtO.layout + ) + tTMEM_STOREtO_i = cute.make_tensor( + tTMEM_STOREtO.iterator + i * corr_tile_size, tTMEM_STOREtO.layout + ) + + cute.copy(tiled_tmem_load_o, tTMEM_LOADtO_i, tTMrO_i) + for j in cutlass.range(cute.size(tTMrO_i), vectorize=True): + tTMrO_i[j] = tTMrO_i[j] * inv_row_sum + cute.copy(tiled_tmem_store_o, tTMrO_i, tTMEM_STOREtO_i) + + cute.arch.fence_view_async_tmem_store() + + # Epilogue: TMEM → SMEM → GMEM via TMA store. tCtO_base = cute.make_tensor(tmem_ptr + self.tmem_o0_offset, tCtO_fake.layout) - acc_cons_st = pipeline.make_pipeline_state(pipeline.PipelineUserType.Consumer, self.num_acc_stage) + acc_cons_st = pipeline.make_pipeline_state( + pipeline.PipelineUserType.Consumer, self.num_acc_stage + ) c_grp = pipeline.CooperativeGroup(pipeline.Agent.Thread, 32 * len(self.epilogue_warp_id)) c_pipe = pipeline.PipelineTmaStore.create(num_stages=self.num_c_stage, producer_group=c_grp) acc_cons_st = utils.gemm.sm100.epilogue_tma_store( @@ -495,5 +391,6 @@ class FmhaKernel: acc_cons_st, acc_pipe, c_pipe, ) c_pipe.producer_tail() + tmem.relinquish_alloc_permit() tmem.free(tmem_ptr)