f85ec649d7
- Add BF16 support for SM90 and SM100 - Refactor Python APIs - Other fixes and code refactoring
86 lines
4.3 KiB
C++
86 lines
4.3 KiB
C++
#pragma once
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#include "../utils/layout.hpp"
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#include "../jit_kernels/impls/smxx_layout.hpp"
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namespace deep_gemm::layout {
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static torch::Tensor transform_sf_into_required_layout(const torch::Tensor& sf,
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const int& mn, const int& k,
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const std::tuple<int, int, int>& recipe,
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const std::optional<int>& num_groups,
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const bool& is_sfa,
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const bool& disable_ue8m0_cast) {
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const auto& gran_mn = is_sfa ? std::get<0>(recipe) : std::get<1>(recipe);
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const auto& gran_k = std::get<2>(recipe);
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const auto& arch_major = device_runtime->get_arch_major();
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// Pre-transform checks
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check_sf_layout(sf, mn, k, gran_mn, gran_k, num_groups);
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// (FP32, 1, 128) on SM90: transform to TMA-aligned and MN-major
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if (sf.scalar_type() == torch::kFloat and gran_mn == 1 and gran_k == 128 and (arch_major == 9 or disable_ue8m0_cast))
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return get_mn_major_tma_aligned_tensor(sf);
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// (FP32, 1, 128) on SM100: transform to (INT, 1, 128), TMA-aligned and MN-major
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if (sf.scalar_type() == torch::kFloat and gran_mn == 1 and gran_k == 128 and arch_major == 10) {
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DG_HOST_ASSERT(not disable_ue8m0_cast);
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return get_mn_major_tma_aligned_packed_ue8m0_tensor(sf);
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}
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// (FP32, 128, 128) on SM90: no need to transform, check shape and contiguous
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if (sf.scalar_type() == torch::kFloat and gran_mn == 128 and gran_k == 128 and (arch_major == 9 or disable_ue8m0_cast))
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return check_sf_layout(sf, mn, k, gran_mn, gran_k, num_groups, false, true, torch::kFloat);
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// (FP32, 128, 128) on SM100: transform to (INT, 1, 128), TMA-aligned and MN-major
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if (sf.scalar_type() == torch::kFloat and gran_mn == 128 and gran_k == 128 and arch_major == 10) {
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DG_HOST_ASSERT(not disable_ue8m0_cast);
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const auto& broadcasted = sf.index_select(-2, torch::arange(mn, at::TensorOptions().device(sf.device())).floor_divide_(128));
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return get_mn_major_tma_aligned_packed_ue8m0_tensor(broadcasted);
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}
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// (INT, 1, 128) on SM100: transform to TMA-aligned and MN-major
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if (sf.scalar_type() == torch::kInt and gran_mn == 1 and gran_k == 128 and arch_major == 10)
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return check_sf_layout(sf, mn, k, gran_mn, gran_k, num_groups, true, false, torch::kInt);
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DG_HOST_UNREACHABLE("Unknown SF transformation");
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}
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static torch::Tensor transform_k_grouped_sf_into_required_layout(const torch::Tensor& sf,
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const std::vector<int>& ks,
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const torch::Tensor& ks_tensor,
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const std::tuple<int, int, int>& recipe) {
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DG_HOST_ASSERT(sf.dim() == 2);
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DG_HOST_ASSERT(recipe == std::make_tuple(1, 1, 128));
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const auto& arch_major = device_runtime->get_arch_major();
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// FP32 on SM90
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if (sf.scalar_type() == torch::kFloat and arch_major == 9)
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DG_HOST_UNREACHABLE("Unimplemented");
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// FP32 on SM100
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if (sf.scalar_type() == torch::kFloat and arch_major == 10)
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return get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor(sf, ks_tensor, ks);
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// INT on SM100
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if (sf.scalar_type() == torch::kFloat and arch_major == 10)
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DG_HOST_UNREACHABLE("Unimplemented");
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DG_HOST_UNREACHABLE("Unknown cases");
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}
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static void register_apis(pybind11::module_& m) {
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m.def("transform_sf_into_required_layout", &transform_sf_into_required_layout,
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py::arg("sf"), py::arg("mn"), py::arg("k"), py::arg("recipe"),
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py::arg("num_groups") = std::nullopt, py::arg("is_sfa") = false,
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py::arg("disable_ue8m0_cast") = false);
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m.def("get_tma_aligned_size", &get_tma_aligned_size);
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m.def("get_mk_alignment_for_contiguous_layout", &get_mk_alignment_for_contiguous_layout);
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m.def("get_mn_major_tma_aligned_tensor", &get_mn_major_tma_aligned_tensor);
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m.def("get_mn_major_tma_aligned_packed_ue8m0_tensor", &get_mn_major_tma_aligned_packed_ue8m0_tensor);
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m.def("get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor", &get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor);
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}
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} // namespace deep_gemm::layout
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