[Public release 26/04] Introducing Mega MoE, FP4 Indexer and other features/fixes (#304)
* Merge with private repo * Update README * Update README * Update README * Add PyTorch requirements * Fix sync scopes for MQA logits (#256) * Update README
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@@ -1,6 +1,6 @@
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import torch
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import random
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from deep_gemm.testing import bench_kineto, count_bytes
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from deep_gemm.testing import bench_kineto, count_bytes, get_arch_major
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from deep_gemm.utils import (
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align, ceil_div,
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per_token_cast_to_fp8, per_channel_cast_to_fp8,
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@@ -43,9 +43,9 @@ def get_mn_major_tma_aligned_packed_ue8m0_tensor_torch_impl(x: torch.Tensor) ->
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def test_sf_layout_kernels() -> None:
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print('Testing SF layout kernels:')
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for mn, k, with_transpose, use_ue8m0, num_groups in enumerate_sf_layout():
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for mn, k, with_transpose, use_ue8m0, num_groups, gran_k in enumerate_sf_layout():
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x = torch.randn((num_groups * mn, k), dtype=torch.bfloat16, device='cuda')
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x, fp32_sf = per_token_cast_to_fp8(x, use_ue8m0=use_ue8m0)
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x, fp32_sf = per_token_cast_to_fp8(x, use_ue8m0=use_ue8m0, gran_k=gran_k)
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fp32_sf = fp32_sf if num_groups == 1 else fp32_sf.view(num_groups, mn, -1)
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fp32_sf = fp32_sf if with_transpose else fp32_sf.transpose(-1, -2).contiguous().transpose(-1, -2)
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@@ -60,7 +60,7 @@ def test_sf_layout_kernels() -> None:
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else:
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impl, name = get_mn_major_tma_aligned_tensor, 'transpose'
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transposed_sf = get_mn_major_tma_aligned_tensor(fp32_sf)
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tma_aligned_mn, sf_k = get_tma_aligned_size(mn, fp32_sf.element_size()), ceil_div(k, 128)
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tma_aligned_mn, sf_k = get_tma_aligned_size(mn, fp32_sf.element_size()), ceil_div(k, gran_k)
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if num_groups > 1:
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assert transposed_sf.size(0) == num_groups
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assert transposed_sf.stride(0) == tma_aligned_mn * sf_k
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@@ -74,22 +74,22 @@ def test_sf_layout_kernels() -> None:
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except AssertionError as e:
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# Some cases may fallback to PyTorch impl
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t = 0
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print(f' > Perf ({num_groups=:2}, {mn=:5}, {k=:5}, transpose={int(with_transpose)}, use_ue8m0={int(use_ue8m0)}): '
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print(f' > Perf ({num_groups=:2}, {mn=:5}, {k=:5}, transpose={int(with_transpose)}, use_ue8m0={int(use_ue8m0)}, gran_k={gran_k:3}): '
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f'{t * 1e6:4.0f} us | {count_bytes(fp32_sf, impl(fp32_sf)) / 1e9 / t if t else 0:4.0f} GB/s')
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print()
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def test_k_grouped_sf_layout_kernels() -> None:
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print('Testing k-grouped SF layout kernels:')
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for mn, ks, num_groups in enumerate_k_grouped_sf_layout():
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sf_ks = [k // 128 for k in ks]
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packed_sf_ks = [ceil_div(k, 512) for k in ks]
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for mn, ks, num_groups, gran_k in enumerate_k_grouped_sf_layout():
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sf_ks = [k // gran_k for k in ks]
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packed_sf_ks = [ceil_div(k, gran_k * 4) for k in ks]
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ks_tensor = torch.tensor(ks, dtype=torch.int, device='cuda')
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x = torch.randn((sum(ks), mn), dtype=torch.bfloat16, device='cuda')
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x, fp32_sf = per_channel_cast_to_fp8(x, use_ue8m0=True)
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x, fp32_sf = per_channel_cast_to_fp8(x, use_ue8m0=True, gran_k=gran_k)
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# Correctness
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packed_sf = get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor(fp32_sf, ks_tensor, ks)
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packed_sf = get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor(fp32_sf, ks_tensor, ks, gran_k)
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split_packed_sf = packed_sf.split(packed_sf_ks)
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split_fp32_sf = fp32_sf.split(sf_ks)
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for i in range(num_groups):
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@@ -97,8 +97,8 @@ def test_k_grouped_sf_layout_kernels() -> None:
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assert torch.equal(split_packed_sf[i], ref_packed_sf), f'{i=}'
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# Performance
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t = bench_kineto(lambda: get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor(fp32_sf, ks_tensor, ks), 'pack_fp32_into_ue8m0')
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print(f' > Perf ({num_groups=:3}, {mn=:5}, sum_k={sum(ks):5}):'
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t = bench_kineto(lambda: get_k_grouped_mn_major_tma_aligned_packed_ue8m0_tensor(fp32_sf, ks_tensor, ks, gran_k), 'pack_fp32_into_ue8m0')
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print(f' > Perf ({num_groups=:3}, {mn=:5}, sum_k={sum(ks):5}, gran_k={gran_k:3}):'
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f'{t * 1e6:4.0f} us | '
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f'{count_bytes(fp32_sf, packed_sf, ks_tensor) / 1e9 / t:4.0f} GB/s')
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print()
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