[Public release 26/04] Introducing Mega MoE, FP4 Indexer and other features/fixes (#304)
* Merge with private repo * Update README * Update README * Update README * Add PyTorch requirements * Fix sync scopes for MQA logits (#256) * Update README
This commit is contained in:
Chenggang Zhao
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csrc/apis/mega.hpp
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216
csrc/apis/mega.hpp
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#pragma once
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#include <functional>
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#include <pybind11/functional.h>
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#if DG_TENSORMAP_COMPATIBLE
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#include "../jit/compiler.hpp"
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#endif
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#include "../jit/device_runtime.hpp"
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#include "../jit_kernels/impls/sm100_fp8_fp4_mega_moe.hpp"
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namespace deep_gemm::mega {
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static std::tuple<int64_t, std::function<std::tuple<torch::Tensor, torch::Tensor, torch::Tensor, torch::Tensor, torch::Tensor, torch::Tensor, torch::Tensor, torch::Tensor>(const torch::Tensor&)>>
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get_symm_buffer_size_for_mega_moe(
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const int& num_ranks, const int& num_experts,
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const int& num_max_tokens_per_rank, const int& num_topk,
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const int& hidden, const int& intermediate_hidden,
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const bool& use_fp8_dispatch, const std::string& activation) {
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DG_HOST_ASSERT(num_experts % num_ranks == 0);
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// Workspace bytes
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const auto block_m = get_block_m_for_mega_moe(num_ranks, num_experts, num_max_tokens_per_rank, num_topk);
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const auto workspace = layout::Workspace(nullptr, num_ranks, num_experts, num_max_tokens_per_rank, num_topk, block_m);
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// Layouts
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const auto fp8_token_layout = layout::Data(hidden);
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const auto bf16_token_layout = layout::Data(hidden * 2);
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const auto fp8_intermediate_token_layout = layout::Data(intermediate_hidden);
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const auto fp8_sf_layout = layout::Data(hidden / 32);
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const auto fp8_intermediate_sf_layout = layout::Data(intermediate_hidden / 32);
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const auto input_topk_idx_layout = layout::Data(num_topk * sizeof(int64_t), false);
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const auto input_topk_weights_layout = layout::Data(num_topk * sizeof(float), false);
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const auto l1_topk_weights_layout = layout::Data(sizeof(float), false);
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// Input buffers
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const auto input_token_buffer = layout::Buffer(
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fp8_token_layout, 1, num_max_tokens_per_rank,
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workspace.get_end_ptr());
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const auto input_sf_buffer = layout::Buffer(
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fp8_sf_layout, 1, num_max_tokens_per_rank,
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input_token_buffer.get_end_ptr());
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const auto input_topk_idx_buffer = layout::Buffer(
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input_topk_idx_layout, 1, num_max_tokens_per_rank,
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input_sf_buffer.get_end_ptr());
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const auto input_topk_weights_buffer = layout::Buffer(
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input_topk_weights_layout, 1, num_max_tokens_per_rank,
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input_topk_idx_buffer.get_end_ptr());
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// Buffer configs
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const auto num_max_pool_tokens = static_cast<int>(workspace.num_max_pool_tokens);
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const auto num_padded_sf_pool_tokens = layout::get_num_padded_sf_pool_tokens(num_max_pool_tokens, block_m);
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// L1 input buffer
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const auto l1_token_buffer = layout::Buffer(
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fp8_token_layout, 1, num_max_pool_tokens,
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input_topk_weights_buffer.get_end_ptr());
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const auto l1_sf_buffer = layout::Buffer(
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fp8_sf_layout, 1, num_padded_sf_pool_tokens,
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l1_token_buffer.get_end_ptr());
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const auto l1_topk_weights_buffer = layout::Buffer(
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l1_topk_weights_layout, 1, num_max_pool_tokens,
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l1_sf_buffer.get_end_ptr());
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// L2 input buffer
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const auto l2_token_buffer = layout::Buffer(
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fp8_intermediate_token_layout, 1, num_max_pool_tokens,
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l1_topk_weights_buffer.get_end_ptr());
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const auto l2_sf_buffer = layout::Buffer(
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fp8_intermediate_sf_layout, 1, num_padded_sf_pool_tokens,
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l2_token_buffer.get_end_ptr());
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// Combine input buffer: BF16 tokens for cross-rank combine
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const auto combine_token_buffer = layout::Buffer(
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bf16_token_layout, num_topk, num_max_tokens_per_rank,
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l2_sf_buffer.get_end_ptr());
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// Check SF buffer requirements
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DG_HOST_ASSERT(hidden % 128 == 0 and intermediate_hidden % 128 == 0);
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DG_HOST_ASSERT(num_padded_sf_pool_tokens % 4 == 0);
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// Slice function: creates `(x, x_sf, topk_weights, topk_idx, l1_acts, l1_acts_sf, l2_acts, l2_acts_sf)` tensor views from the raw buffer
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// NOTES: `x_sf` is K-major, while `l1_acts_sf` and `l2_acts_sf` are M-major
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auto slice_input_buffers = [=](const torch::Tensor& buffer) {
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auto x = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(input_token_buffer.base)),
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{num_max_tokens_per_rank, hidden},
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torch::TensorOptions().dtype(torch::kFloat8_e4m3fn).device(buffer.device()));
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auto x_sf = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(input_sf_buffer.base)),
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{num_max_tokens_per_rank, hidden / 128},
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torch::TensorOptions().dtype(torch::kInt).device(buffer.device()));
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auto topk_idx = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(input_topk_idx_buffer.base)),
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{num_max_tokens_per_rank, num_topk},
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torch::TensorOptions().dtype(torch::kInt64).device(buffer.device()));
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auto topk_weights = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(input_topk_weights_buffer.base)),
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{num_max_tokens_per_rank, num_topk},
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torch::TensorOptions().dtype(torch::kFloat32).device(buffer.device()));
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auto l1_acts = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(l1_token_buffer.base)),
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{num_max_pool_tokens, hidden},
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torch::TensorOptions().dtype(torch::kFloat8_e4m3fn).device(buffer.device()));
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auto l1_acts_sf = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(l1_sf_buffer.base)),
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{num_padded_sf_pool_tokens, hidden / 128},
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{1, num_padded_sf_pool_tokens},
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torch::TensorOptions().dtype(torch::kInt).device(buffer.device()));
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auto l2_acts = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(l2_token_buffer.base)),
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{num_max_pool_tokens, intermediate_hidden},
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torch::TensorOptions().dtype(torch::kFloat8_e4m3fn).device(buffer.device()));
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auto l2_acts_sf = torch::from_blob(
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math::advance_ptr(buffer.data_ptr(), reinterpret_cast<int64_t>(l2_sf_buffer.base)),
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{num_padded_sf_pool_tokens, intermediate_hidden / 128},
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{1, num_padded_sf_pool_tokens},
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torch::TensorOptions().dtype(torch::kInt).device(buffer.device()));
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return std::make_tuple(x, x_sf, topk_idx, topk_weights, l1_acts, l1_acts_sf, l2_acts, l2_acts_sf);
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};
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return {reinterpret_cast<int64_t>(combine_token_buffer.get_end_ptr()), slice_input_buffers};
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}
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static void fp8_fp4_mega_moe(
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const torch::Tensor& y,
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const std::tuple<torch::Tensor, torch::Tensor>& l1_weights_,
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const std::tuple<torch::Tensor, torch::Tensor>& l2_weights_,
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const torch::Tensor& sym_buffer,
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const std::vector<int64_t>& sym_buffer_ptrs, const int& rank_idx,
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const int& num_max_tokens_per_rank,
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const int& num_experts, const int& num_topk,
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const std::tuple<int, int, int>& recipe,
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const std::string& activation,
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const std::optional<float>& activation_clamp_opt,
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const bool& fast_math) {
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const auto [l1_weights, l1_weights_sf] = l1_weights_;
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const auto [l2_weights, l2_weights_sf] = l2_weights_;
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// Config checks
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const auto num_tokens = static_cast<int>(y.size(0));
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const auto [rm, rn, rk] = recipe;
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DG_HOST_ASSERT(rm == 1 and rn == 1 and rk == 32);
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DG_HOST_ASSERT(activation == "swiglu");
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// Activation checks
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const auto activation_clamp =
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activation_clamp_opt.value_or(std::numeric_limits<float>::infinity());
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DG_HOST_ASSERT(activation_clamp >= 0);
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// Tensor checks
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DG_HOST_ASSERT(get_major_type_ab(l1_weights) == cute::UMMA::Major::K);
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DG_HOST_ASSERT(get_major_type_ab(l2_weights) == cute::UMMA::Major::K);
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const auto arch_major = device_runtime->get_arch_major();
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const auto [num_experts_per_rank, intermediate_hidden_2, hidden] =
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check_grouped_ab_fp8_fp4(l1_weights, cute::UMMA::Major::K, arch_major);
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const auto [num_experts_per_rank_, hidden_, intermediate_hidden] =
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check_grouped_ab_fp8_fp4(l2_weights, cute::UMMA::Major::K, arch_major);
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DG_HOST_ASSERT(num_tokens <= num_max_tokens_per_rank);
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DG_HOST_ASSERT(num_experts_per_rank == num_experts_per_rank_);
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DG_HOST_ASSERT(hidden == hidden_);
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DG_HOST_ASSERT(intermediate_hidden_2 == 2 * intermediate_hidden);
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DG_HOST_ASSERT(l1_weights.is_contiguous() and l2_weights.is_contiguous());
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// Check weight SF layout for UE8M0 packing, MN-major, and TMA alignment
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constexpr int kGranMN = 1, kGranK = 32;
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check_sf_layout(l1_weights_sf, intermediate_hidden * 2, hidden, kGranMN, kGranK,
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num_experts_per_rank, true, false, torch::kInt);
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check_sf_layout(l2_weights_sf, hidden, intermediate_hidden, kGranMN, kGranK,
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num_experts_per_rank, true, false, torch::kInt);
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// Check buffer bytes
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const auto num_ranks = static_cast<int>(sym_buffer_ptrs.size());
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const auto num_experts_ = num_experts_per_rank * num_ranks;
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const auto [num_required_bytes, slice] = get_symm_buffer_size_for_mega_moe(
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num_ranks, num_experts,
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num_max_tokens_per_rank, num_topk,
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hidden, intermediate_hidden,
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true, "swiglu");
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DG_HOST_ASSERT(sym_buffer.nbytes() >= static_cast<size_t>(num_required_bytes));
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DG_HOST_ASSERT(num_experts == num_experts_);
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// Already registered tensors
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const auto [x, x_sf, topk_idx, topk_weights, l1_acts, l1_acts_sf, l2_acts, l2_acts_sf] = slice(sym_buffer);
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// Dispatch into different architectures
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if (arch_major == 10) {
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sm100_fp8_fp4_mega_moe(y,
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l1_acts, l1_acts_sf,
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l2_acts, l2_acts_sf,
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l1_weights, l2_weights,
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l1_weights_sf, l2_weights_sf,
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sym_buffer_ptrs,
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rank_idx, num_max_tokens_per_rank,
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num_experts_per_rank,
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num_tokens, num_topk,
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hidden, intermediate_hidden,
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activation_clamp, fast_math);
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} else {
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DG_HOST_UNREACHABLE("Unsupported architecture");
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}
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// Zero the entire symmetric buffer for debug mode
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// NOTES: caller must re-copy inputs into the buffer before each kernel call
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if (get_env<int>("DG_COMM_KERNEL_DEBUG"))
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sym_buffer.zero_();
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}
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static void register_apis(pybind11::module_& m) {
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#if DG_TENSORMAP_COMPATIBLE
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m.def("get_block_m_for_mega_moe", &get_block_m_for_mega_moe);
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m.def("get_symm_buffer_size_for_mega_moe", &get_symm_buffer_size_for_mega_moe);
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m.def("fp8_fp4_mega_moe", &fp8_fp4_mega_moe);
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#endif
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}
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} // namespace deep_gemm::mega
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